Naveen H.S. wrote:
> SH2A, SH4 and SH4A FPU targets support mode switching i.e. switching
> between single precision and double precision. Double-precision FPU
> is also available for the above mentioned targets.
>
> The option "-mfmovd" is enabled by default for SH2A which generates
> "fmov.d" instruction by default. However, SH4 and SH4A targets
> generates "fmov.d" instruction only after passing the option "-mfmovd".
>
> Can somebody clarify the reason behind above implementation?
> The instruction "fmov.d" may generate "address error" exception in
> some cases as the address involved in "fmov.d" instruction is not
> always 8 byte aligned. This problem can be easily resolved by passing
> option "-mdalign"(aligns double on 8 byte boundary).
It's been a while since I've worked on the SH4, but from what I remember, there
are two problems:
First, fmovd doesn't work properly on the SH4 in little-endian mode.
In little-endian mode, it loads the two 32-bit values swapped, so if the value
in memory is 0x0123456789abcdef, you get 0x89abcdef01234567 instead.
Second, -mdalign only affects alignment of statically allocated variables, and
does not affect stack alignment. So, 64-bit values on the stack are not
guaranteed to be 64-bit aligned even with -mdalign.
Toshi
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