"Sean D'Epagnier" <[EMAIL PROTECTED]> writes: > -> (insn 10 9 11 (nil) (set (reg:HI 54) > -> (and:HI (reg:HI 53) > -> (mem:HI (mem/f:HI (plus:HI (reg/f:HI 49 virtual-stack-vars) > -> (const_int 2 [0x2])) [0 b+0 S2 A16]) [0 S2 A8]))) > -1 (nil) > -> (nil))
> I am trying to find out what part of gcc to look in so I can make the change > so that the and > instruction is handled the same way. Look at the andhi3 insns in the CPU.md file. You may need to change the constraints there, or rework the insn somehow. Ian
