Quoting Steven Bosscher <[EMAIL PROTECTED]>:

> On 12/13/06, Joern Rennecke <[EMAIL PROTECTED]> wrote:
> > In http://gcc.gnu.org/ml/gcc/2006-12/msg00328.html, you wrote:
> > However, because the SH has delayed branches, there is always a guaranteed
> way
> > to find a register - one can be saved, and then be restored in the delay
> slot.
>
> Heh, that's an interesting feature :-)
>
> How does that work?  I always thought that the semantics of delayed
> insns is that the insn in the delay slot is executed *before* the
> branch. But that is apparently not the case, or the branch register
> would have been over-written before the branch. How does that work on
> SH?

The jump address is calculated, then the delay slot instruction is
executed - or sometimes, if the instructions are pairable, the delay
slot insn is executed simultanously with the jump address calculations,
then - or during the delay slot insn execution - the target instruction
is fetched, and then executed.  You can look into sim/sh/interp.c for
a functional model of how this works from the programmer's point of view.

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