On 06 Dec 2006 23:13:35 -0800, Ian Lance Taylor <[EMAIL PROTECTED]> wrote:
David Daney <[EMAIL PROTECTED]> writes:
> > I am working on a private target where jump instruction patterns are
> > similiar to this
> >
> > jmp <24 bit offset>
> > jmp <address register> for 32 bit offsets
> >
> > if my offset is greater than 24 bits, then i have to move the offset
> > to an address register. But inside the branch instruction (in md
> > file), i am not able to generate a pseudo register because the
> > condition check for "no_new_pseudos " fails.
> >
> > Can any one suggest a way to overcome this?
> >
> This is similar to how the MIPS works. Perhaps looking at its
> implementation would be useful.
MIPS simply reserves a register, $1. $1 is by convention reserved for
use in assembler code. gcc uses it for a long branch.
I have done this. It works perfectly. But i cannot afford to lose a register.
If you can't afford to lose a register, then I think your only option
is to pick some callee-saved register and have each branch instruction
explicitly clobber it. Then it will be available for use in a long
branch, and it will be available for use within a basic block. This
is far from ideal, but I don't know a better way to handle it within
gcc's current framework.
Can i get more clarity on this part. Is it implemented in any other backends?
When you say "pick some callee-saved register ", is it to pick them
randomly from an available set in CALL_USED_REGISTERS or a specific
register.
Ian
Regards,
Rohit
