On Sun, Jun 04, 2006 at 05:26:42PM +0200, Wolfgang Mües wrote: > Paul, > > On Sunday 04 June 2006 13:24, Paul Brook wrote: > > > You should just change the valid QImode memory addresses, adding a new > > constraint if neccessary. > > Hmmmm... I have tried this. I have changed the operand constraint from > "m" to "Q". But these constraints are only used to select the right > alternative inside the insn, not which insn is invoked. It might be > possible to modify "nonimmediate_operand" > into something else, to select this insn only if the address is fitting > in a single register, without offset or increment.
There's no need to modify "nonimmediate_operand" or use another predicate. It matches a memory operand, which is fine. > But this will not give me the freedom to allocate a temporary register. See TARGET_SECONDARY_RELOAD in the section "Register Classes". > According to the manual, mov insns are not supposed to clobber a > register. I can't find any statement to that effect. Where does it say so? But I can see why it would be a problem when reload_in_progress. (It would make it difficult to convert the m68k backend from cc0 to CC_REG.) -- Rask Ingemann Lambertsen
