On Wed, May 31, 2006 at 10:49:35PM +0200, Wolfgang Mües wrote: > > (define_insn "*arm_movqi_insn" > > [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,m") > > (match_operand:QI 1 "general_operand" "rI,K,m,r"))] > > "TARGET_ARM > > && ( register_operand (operands[0], QImode) > > > > || register_operand (operands[1], QImode))" > > > > "@ > > mov%?\\t%0, %1 > > mvn%?\\t%0, #%B1 > > ldr%?b\\t%0, %1 > > str%?b\\t%1, %0" > > [(set_attr "type" "*,*,load1,store1") > > (set_attr "predicable" "yes")] > > )
I think you should go back to this (i.e. the unmodified version) and only change the "m" into "Q" in the fourth alternative of operand 0. See if that works, i.e. generates addresses that are valid for the swp instruction. If it does, then begin to add other changes. -- Rask Ingemann Lambertsen
