Hello Rask,

On Friday 02 June 2006 09:24, Rask Ingemann Lambertsen wrote:
> There may be a faster way of seeing if the modification is going to
> work for the DS at all. I noticed from the output template
> "swp%?b\\t%1, %1, [%M0]" that "swp" takes three operands. I don't
> know ARM assembler, but you may be able to choose to always clobber a
> specific register. Make it a fixed register (see FIXED_REGISTERS),
> refer to this register directly in the output template and don't add
> a clobber to the movqi patterns. IMHO, that's an acceptable hack at
> an experimental stage. If the resulting code runs correctly on the
> DS, you can then undo the FIXED_REGISTERS change and add the clobber
> statements.

I have tried this. No luck. Problem is the lack of addressing modes for 
the swp instruction. Only a simple pointer in a register (no offset, no 
auto-increment is allowed).

After reading most of the gcc rtl documentation (and forgetting way too 
much..) I came up to the following conclusion:

Splitting the insn

(define_insn "*arm_movqi_insn"
  [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,m")
        (match_operand:QI 1 "general_operand" "rI,K,m,r"))]

into 4 different insns:

(define_insn "*arm_movqi_insn"
  [(set (match_operand:QI 0 "register_operand" "")
         (match_operand:QI 1 "register_operand" ""))]

(define_insn "*arm_movnqi_insn"
  [(set (match_operand:QI 0 "register_operand" "")
         (match_operand:QI 1 "constant_operand" ""))]

(define_insn "*arm_loadqi_insn"
  [(set (match_operand:QI 0 "register_operand" "")
         (match_operand:QI 1 "memory_operand" ""))]

(define_insn "*arm_storeqi_insn"
  [(set (match_operand:QI 0 "memory_operand" "")
         (match_operand:QI 1 "register_operand" ""))]

This should give the same function as before, but I then I can do

(define_insn "*arm_storeqi_insn"
  [(set (match_operand:QI 0 "simple_memory_operand" "")
         (match_operand:QI 1 "register_operand" ""))]

etc

to limit the addressing modes of the store insn to the limits of the 
swpb instruction.

And then I can recode the 

(define_expand "movqi"
  [(set (match_operand:QI 0 "general_operand" "")
        (match_operand:QI 1 "general_operand" ""))]

to cope with the movqi requirements defined in the gcc manual.

Hmmm... wondering who all these xxx_operand functions are defined, and 
where they are documented...

Is this the right way to go?

regards

Wolfgang
-- 
We're back to the times when men were men 
and wrote their own device drivers.

(Linus Torvalds)

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