On Fri, Apr 07, 2006 at 03:52:06PM +0200, Sylvain Pion wrote: > My question now is related to the capacity of the compilers in general, > and GCC in particular, to optimize away some of useless rounding mode > function calls.
In principal it's not a complex task, though we've nothing to support it at the moment. It could be done fairly trivially with the ssa propagation engine. > The properties needed on the builtins to perform the optimizations > I think are : > - two calls to fesetround which are not separated by floating point > computations can be simplified by removing the first call. > - if a call to fesetround is followed by a call fegetround with no > intermediate call to fesetround, then the call to fegetround > can be replaced by taking the argument passed to fesetround. > - if two calls to fesetround with the same argument are not > separated by some other call to fesetround (or other operation > manipulating the FPU rounding mode register), the second call > can be removed. Don't forget function calls. You have to assume calls need the current rounding mode, and can change the current rounding mode. Then there's the case of the (sadly lamented) Alpha, which can encode rounding modes into the insns directly, instead of any dynamic mode switching whatsoever. So being able to recognize the current rounding mode for a stmt is a Good Thing. This can still be relevant for ia64, with some extra effort. There are 4 fp control registers, and a field in the insn controls which one to use. Register 0 is the default "master" register, and holds the official ieee state. Register 1 is reserved for integer division. But registers 2 and 3 are available for whatever the compiler wants. The intended use is speculation, but there's no reason we couldn't have them set to different rounding modes to avoid repeated changes between 2 or 3 rounding modes. r~
