"Jakub Jelinek" <ja...@redhat.com> wrote:
> On Fri, May 26, 2023 at 02:19:54PM +0200, Stefan Kanthak wrote:
>> > I find it very SURPRISING that you're only just learning the basics of
>> > how to use gcc NOW, after YELLING about all the OUCH.
>>
>> I'm NOT surprised that you don't grok it!
>>
>> gcc -msse4.1 -m32 -march=core2 ...
>>
>> Which -m* options win here?
>> Do -m32 or -march=core2 override -msse4.1?
>
> Jonathan told you what to use to find it out (-Q --help=target).
> -m32/-m64/-mx32/-m16 options don't affect the ISA, they switch the
> main ABI (ilp32 32-bit code, lp64 64-bit code, ilp32 code running
> in 64-bit mode, 16-bit code).
PLEASE read your own documentation and specify ANY:
| -m32
...
| generates code that runs on any i386 system.
The first example of my initial posts falsifies "runs on any i386 system"!
> -march= options selects the ISA base (which CPU family to compile form
> as minimum), if you don't supply it, the default from how gcc has been
> configured is selected (e.g. if you configure --with-arch-32=core2, then
> that will be the -m32 default, if you configure --with-arch=x86-64, that
> will be the -march default if --with-arch-32= isn't specified, etc.).
> If more than one -march= is specified, the last one wins.
But "the last one wins" does NOT apply to -m32 or -m<feature>: the latter
are additive, INDEPENDENT from their position before or after -march=,
what is NOT documented, and -m32 fails to disable all -m<feature> not
common to ANY i386 system set before, thus contradicting the documentation.
> And, the -mISA options then tweak the ISA set. Most ISAs have dependencies,
> say -msse4.1 enables -mssse3 which enables -msse3 which enables -msse2 etc.,
> and similarly the -mno-ISA options disable what ISAs depend on it, so
> -mno-avx disables -mno-avx2 which disables -mno-avx512f which disables ...
These points are obvious.
NOT obvious is but that -m<feature> -march=<lowerISA> does not clear any
<feature> not supported in <lowerISA>, i.e the last one does NOT win here.
JFTR: because -m32 -mtune=i386 disables SSE instructions I made the wrong
assumption "-mtune=native is the default", upon which (not only) you
reacted like your compiler when it encounters UB and stopped reading.
> -mtune= option specifies for which CPU family the code should be tuned,
> it will still run on any code compatible with the implicit or explicit
> -march=, but will schedule instructions or choose from alternative forms
> from the selected ISAs to perform best on the -mtune= family.
The third example of my initial post disables SSE2 with -mtune=i386, but
does NOT "perform best" on the i386 family: before the corei all i386 CPUs
run MOV <reg>,<reg> plus AND <reg>,<reg> slower than AND <reg>,<memory>,
i.e. the code generated with -mtune=i586 performs best.
JTFR: my post is NOT about "How to use GCC", it's about the not properly
optimised code.
Stefan
