> So the combination of the TCB merge plus the pending jump threading > changes apparently has ticked a reload bug which manifests itself with > the stage1 compiler mis-compiling the stage2 compiler. > > [...] > > Which faults because the memory location is actually read-only memory.
PR rtl-optimization/15248. > What's not clear to me is how best to fix this. > > We could try to delete all assignments to pseudos which are equivalent > to MEMs. > > We could avoid recording equivalences when the pseudo is set more than > once. > > Other possibilities? For 3.3 and 3.4, this was "fixed" by not recording memory equivalences that have the infamous RTX_UNCHANGING_P flag set. -- Eric Botcazou
