Andrew Bennett <andrew.benn...@imgtec.com> writes: >> -----Original Message----- >> From: Richard Sandiford [mailto:rdsandif...@googlemail.com] >> Sent: 09 May 2014 12:07 >> To: Andrew Bennett >> Cc: gcc-patches@gcc.gnu.org; Matthew Fortune; Saeed Ghazanfar; Rich Fuhler >> Subject: Re: [PATCH] Add support for MIPS r3 and r5 >> >> Andrew Bennett <andrew.benn...@imgtec.com> writes: >> >> > @@ -141,7 +151,8 @@ along with GCC; see the file COPYING3. If not see >> >> > "%{EL:-m elf32lmip} \ >> >> > %{EB:-m elf32bmip} \ >> >> > %(endian_spec) \ >> >> > - %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips32r2} >> >> %{mips64} \ >> >> > + %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips32r2} >> >> \ >> >> > + %{mips32r3} %{mips32r5} %{mips64} \ >> >> > %(netbsd_link_spec)" >> >> > >> >> > #define NETBSD_ENTRY_POINT "__start" >> >> >> >> Not sure the omission of mips64r2 was deliberate here, or in vxworks.h. >> > >> > Yes it was deliberate: mips64r2 was already missing from the original >> ASM_SPEC >> > in vxworks.h and the LINK_SPEC in netbsfd.h. >> >> Right, but that's what I was saying didn't look deliberate. I expect >> it was just missed when mips64r2 was added. > > Would you like me to update the ASM_SPEC and LINK_SPEC to include mips64r[235]
Well, I don't really mind whether we leave the headers as they are in trunk or whether we change them. Neither target is actively maintained. But if we change them, we should make mips64 consistent with mips32. Thanks, Richard
