On 11/21/2013, 12:09 PM, Martin Jambor wrote:
Hi,
the patch below enables IRA live-range splitting that later
facilitates shrink-wrapping also work on ppc64. The difference is
that while on x86_64 it was enough to look for single sets from a hard
register to a pseudo in the first BB, on ppc the instructions are more
complicated and can look like this (example from pr10474.c testcase):
(insn 6 3 7 2 (parallel [
(set (reg:CC 124)
(compare:CC (reg:DI 3 3 [ i ])
(const_int 0 [0])))
(set (reg/v/f:DI 123 [ i ])
(reg:DI 3 3 [ i ]))
]) pr10474.c:6 428 {*movdi_internal2}
(expr_list:REG_DEAD (reg:DI 3 3 [ i ])
(nil)))
So I changed the code that determines whether an instruction is
interesting or not to also go through a parallel instructions and be
happy with them if there is exactly one interesting SET part.
Unfortunately, I also had to change two testcases that check this to
use long instead of int, otherwise I get SUBREG uses that make
split_live_ranges_for_shrink_wrap give up. I will try to get rid of
that limitation (and have other ideas for improvement as well) but
that is something for 4.10. It works for pointers (e.g. in pr10474.c)
and that is probably most important.
Bootstrapped and tested on ppc64-linux ("all" languages), x86_64-linux
("all" languages + Ada and ObjC++) and on ia64-linux (C, C++ and
Fortran). OK for trunk?
It looks ok to me, Martin. The only problem is stage 3 start today. I
don't know what to do in this situation. So let the release managers
decide this. On the other hand a new bug (a missed optimization
opportunity) can be created and then it could be a go. So the rules can
work for you.
