On Tue, Apr 1, 2025 at 12:47 PM Jeff Law <jeffreya...@gmail.com> wrote: > > > > On 3/31/25 7:03 PM, Alexandre Oliva wrote: > > On Mar 31, 2025, Jeff Law <jeffreya...@gmail.com> wrote: > >> I don't immediately see anything in this test or its history to > >> indicate it's only supposed to work for rv64. > > > > It's the 64-bit integral argument rs1. > Right, but ISTM we ought to be able to handle a vector of 64bit integral > types, especially from the intrinsics interface. > > Probably the thing to do is see what the intrinsics docs say. Or maybe > Kito knows offhand.
Long story, fortunately we have some record on that: https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/9 https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/199 > > > > > > On rv64, it's in a single 64-bit register, that needs to be narrowed to > > 32 bits and then sign extended to 64 bits to fit the semantics of > > vwadd.vx. > Ah. A vx form. That's the key here. Indeed I don't think we can have > a 64bit argument for the scalar argument in a .vx form insn. > > So objection cleared. OK for the trunk. > jeff > >
