On Mar 31, 2025, Jeff Law <jeffreya...@gmail.com> wrote:
> On 3/31/25 1:05 PM, Alexandre Oliva wrote:
>> The desired vw{add,sub}.wx instructions don't come up on rv32 for
>> the
>> first two functions, we get v{add,sub}.vx instead.
>> I suppose this is an oversight, and something about the test is
>> meant
>> for rv64 only, but the fact that the instruction is spelled out in the
>> intrinsic name and a different instruction is generated suggests
>> something may be wrong after all.
>> for gcc/testsuite/ChangeLog
>> * gcc.target/riscv/rvv/base/vwaddsub-1.c: Require rv64.
> I don't immediately see anything in this test or its history to
> indicate it's only supposed to work for rv64.
It's the 64-bit integral argument rs1.
On rv64, it's in a single 64-bit register, that needs to be narrowed to
32 bits and then sign extended to 64 bits to fit the semantics of
vwadd.vx.
On rv32, the 64-bit argument is passed in two separate registers, the
narrowing amounts to picking the first of the pair, and at that point it
becomes vadd.vx.
Likewise vwsub.vx->vsub.vx.
So the test is indeed meant for rv64, but only because there's another,
presumably better way to perform the requested operation on rv32.
--
Alexandre Oliva, happy hacker https://blog.lx.oliva.nom.br/
Free Software Activist FSFLA co-founder GNU Toolchain Engineer
More tolerance and less prejudice are key for inclusion and diversity.
Excluding neuro-others for not behaving ""normal"" is *not* inclusive!
