"Andre Vieira (lists)" <andre.simoesdiasvie...@arm.com> writes:
> Here is the latest version of the patch, I wasn't sure whether Richard's
> 'LGTM with...' was meant as a conditional OK and together with the
> changes suggested by Andrew I thought I'd ask again, OK for trunk?
>
>
> As per the AArch64 ISA FEAT_SME does not require FEAT_SVE2. However, we
> don't support SME without SVE2 and bail out with a 'sorry' if this
> configuration is encountered. We may choose to support this in the future.
>
> gcc/ChangeLog:
>
> * config/aarch64/aarch64-arches.def (SME): Remove SVE2 as prerequisite
> and add in FCMA and F16FML.
> * config/aarch64/aarch64.cc (aarch64_override_options_internal):
> Diagnose use of SME without SVE2 and implicitly enable SVE2 when
> enabling SME after streaming mode diagnosis.
> * doc/invoke.texi (sme): Document that this can only be used with the
> sve2 extension.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/aarch64/no-sve-with-sme-1.c: New.
> * gcc.target/aarch64/no-sve-with-sme-2.c: New.
> * gcc.target/aarch64/no-sve-with-sme-3.c: New.
> * gcc.target/aarch64/no-sve-with-sme-4.c: New.
> * gcc.target/aarch64/pragma_cpp_predefs_4.c: Pass +sve2 to existing
> +sme pragma.
> * gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/binary_single_1.c: Likewise.
> *
> gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c:
> * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c:
> Likewise.
> *
> gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c: Likewise.
> * gcc.target/aarch64/sve/acle/general-c/clamp_1.c: Likewise.
> * gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/storexn_1.c: Likewise.
> * gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c:
> Likewise.
> *
> gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c: Likewise.
> * gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c:
> Likewise.
> * gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c: Likewise.
> * gcc.target/aarch64/sve/acle/general-c/write_za_1.c: Likewise.
> * gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c: Likewise.
OK, thanks.
Richard
> diff --git a/gcc/config/aarch64/aarch64-option-extensions.def
> b/gcc/config/aarch64/aarch64-option-extensions.def
> index
> aa8d315c240fbd25b49008b131cc09f04001eb80..4649d8e977a67c37c5cbf2dbb1616aeb12592317
> 100644
> --- a/gcc/config/aarch64/aarch64-option-extensions.def
> +++ b/gcc/config/aarch64/aarch64-option-extensions.def
> @@ -207,7 +207,7 @@ AARCH64_FMV_FEATURE("sve2-sm4", SVE_SM4, (SVE2_SM4))
>
> AARCH64_OPT_EXTENSION("sve2p1", SVE2p1, (SVE2), (), (), "sve2p1")
>
> -AARCH64_OPT_FMV_EXTENSION("sme", SME, (BF16, SVE2), (), (), "sme")
> +AARCH64_OPT_FMV_EXTENSION("sme", SME, (BF16, FCMA, F16, F16FML), (), (),
> "sme")
>
> AARCH64_OPT_EXTENSION("memtag", MEMTAG, (), (), (), "")
>
> diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
> index
> 36b65df50c57267d9c18e430665c411f1bf3cc24..5b1c44e33069e5db33e8201d03cf687c6d92fdc7
> 100644
> --- a/gcc/config/aarch64/aarch64.cc
> +++ b/gcc/config/aarch64/aarch64.cc
> @@ -18759,7 +18759,10 @@ aarch64_override_options_internal (struct
> gcc_options *opts)
> " option %<-march%>, or by using the %<target%>"
> " attribute or pragma", "sme");
> opts->x_target_flags &= ~MASK_GENERAL_REGS_ONLY;
> - auto new_flags = isa_flags | feature_deps::SME ().enable;
> + auto new_flags = (isa_flags
> + | feature_deps::SME ().enable
> + /* TODO: Remove once we support SME without SVE2. */
> + | feature_deps::SVE2 ().enable);
> aarch64_set_asm_isa_flags (opts, new_flags);
> }
>
> @@ -18886,6 +18889,12 @@ aarch64_override_options_internal (struct
> gcc_options *opts)
> SET_OPTION_IF_UNSET (opts, &global_options_set,
> param_fully_pipelined_fma,
> 1);
>
> + /* TODO: SME codegen without SVE2 is not supported, once this support is
> added
> + remove this 'sorry' and the implicit enablement of SVE2 in the checks
> for
> + streaming mode above in this function. */
> + if (TARGET_SME && !TARGET_SVE2)
> + sorry ("no support for %qs without %qs", "sme", "sve2");
> +
> aarch64_override_options_after_change_1 (opts);
> }
>
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index
> 4fbb4cda101ebd14891a3ad80aa5b1bc069b45c6..d15e5c972f60a30bbb21258652ac12f1874c398f
> 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -22068,7 +22068,8 @@ Enable the Pointer Authentication Extension.
> @item cssc
> Enable the Common Short Sequence Compression instructions.
> @item sme
> -Enable the Scalable Matrix Extension.
> +Enable the Scalable Matrix Extension. This is only supported when SVE2 is
> also
> +enabled.
> @item sme-i16i64
> Enable the FEAT_SME_I16I64 extension to SME. This also enables SME
> instructions.
> diff --git a/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-1.c
> b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-1.c
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..e5bb2d95f65fc6d52c39d97187353e056cbb38a8
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-1.c
> @@ -0,0 +1,8 @@
> +/* { dg-do compile } */
> +/* { dg-skip-if "Do not override mcpu or march" { *-*-* } { -mcpu=* -march=*
> } { "" } } */
> +/* { dg-options { "-march=armv8-a+sme" } } */
> +/* { dg-message "sorry, unimplemented: no support for 'sme' without 'sve2'"
> "" { target *-*-* } 0 } */
> +int main (void)
> +{
> + return 0;
> +}
> diff --git a/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-2.c
> b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-2.c
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..13f09b37d724f6d73ef23dc563eb494d51c61033
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-2.c
> @@ -0,0 +1,9 @@
> +/* { dg-do compile } */
> +/* { dg-message "sorry, unimplemented: no support for 'sme' without 'sve2'"
> "" { target *-*-* } 0 } */
> +
> +#pragma GCC target ("arch=armv8.2-a+ssve-fp8fma")
> +
> +int main (void)
> +{
> + return 0;
> +}
> diff --git a/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-3.c
> b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-3.c
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..9e3cbeb6aeb5562e7eb5fab928144e3e4ca3cfd0
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-3.c
> @@ -0,0 +1,8 @@
> +/* { dg-do compile } */
> +/* { dg-message "sorry, unimplemented: no support for 'sme' without 'sve2'"
> "" { target *-*-* } 0 } */
> +
> +int __attribute__ ((target( "arch=armv8.2-a+ssve-fp8fma"))) main (void)
> +{
> + return 0;
> +}
> +
> diff --git a/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-4.c
> b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-4.c
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..04a33a7b01b35adc5e20c0ccf9f6b1414cd7b52c
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-4.c
> @@ -0,0 +1,11 @@
> +/* { dg-do compile } */
> +/* { dg-skip-if "Do not override mcpu or march" { *-*-* } { -mcpu=* -march=*
> } { "" } } */
> +/* { dg-options { "-march=armv8-a" } } */
> +/* { dg-message "sorry, unimplemented: no support for 'sme' without 'sve2'"
> "" { target *-*-* } 0 } */
> +
> +#pragma GCC target "+sme"
> +
> +int main (void)
> +{
> + return 0;
> +}
> diff --git a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
> b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
> index
> 97d68b94512e1ffdd5ceb484a6378b3a1ec9d115..dcac6d5eb6584d10a0d8eda730a100e24821be1a
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
> +++ b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
> @@ -46,7 +46,7 @@
> #error Foo
> #endif
>
> -#pragma GCC target "+sme"
> +#pragma GCC target "+sve2+sme"
> #ifndef __ARM_FEATURE_SME
> #error Foo
> #endif
> @@ -66,7 +66,7 @@
> #error Foo
> #endif
>
> -#pragma GCC target "+nothing+sme"
> +#pragma GCC target "+nothing+sve2+sme"
> #ifdef __ARM_FEATURE_SME_I16I64
> #error Foo
> #endif
> @@ -80,7 +80,7 @@
> #error Foo
> #endif
>
> -#pragma GCC target "+nothing+sme-i16i64"
> +#pragma GCC target "+nothing+sve2+sme-i16i64"
> #ifndef __ARM_FEATURE_SME_I16I64
> #error Foo
> #endif
> @@ -91,7 +91,7 @@
> #error Foo
> #endif
>
> -#pragma GCC target "+nothing+sme-b16b16"
> +#pragma GCC target "+nothing+sve2+sme-b16b16"
> #ifndef __ARM_FEATURE_SME_B16B16
> #error Foo
> #endif
> @@ -105,7 +105,7 @@
> #error Foo
> #endif
>
> -#pragma GCC target "+nothing+sme-f16f16"
> +#pragma GCC target "+nothing+sve2+sme-f16f16"
> #ifndef __ARM_FEATURE_SME_F16F16
> #error Foo
> #endif
> @@ -116,7 +116,7 @@
> #error Foo
> #endif
>
> -#pragma GCC target "+nothing+sme-f64f64"
> +#pragma GCC target "+nothing+sve2+sme-f64f64"
> #ifndef __ARM_FEATURE_SME_F64F64
> #error Foo
> #endif
> @@ -160,7 +160,7 @@
> #error Foo
> #endif
>
> -#pragma GCC target "+nothing+sve-b16b16+sme2"
> +#pragma GCC target "+nothing+sve2+sve-b16b16+sme2"
> #ifndef __ARM_FEATURE_SVE_B16B16
> #error Foo
> #endif
> @@ -168,7 +168,7 @@
> #error Foo
> #endif
>
> -#pragma GCC target "+nothing+sme2p1"
> +#pragma GCC target "+nothing+sve2+sme2p1"
> #ifndef __ARM_FEATURE_SME
> #error Foo
> #endif
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c
> index
> 976d5af7f2373d826bfdb7fcef0a6d267f172db4..7150d37a2aa78e79ab7ae1852cea7c435dda8be1
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c
> @@ -1,6 +1,6 @@
> /* { dg-do compile } */
>
> -#pragma GCC target "+sme2"
> +#pragma GCC target "+sve2+sme2"
>
> #include <arm_sve.h>
>
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c
> index
> 5cc8a4c5c50fcd663db2c43c16ae5aec9b1b14a1..2823264edbdac1988cfbf9cc70bfd89b567f3459
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c
> @@ -1,6 +1,6 @@
> /* { dg-do compile } */
>
> -#pragma GCC target "+sme2"
> +#pragma GCC target "+sve2+sme2"
>
> #include <arm_sve.h>
>
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_single_1.c
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_single_1.c
> index
> aa7633bb322f331ce57f293bfda2c7e124e63873..52f2c090f57b5817f8f7d1938c873f064a0af631
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_single_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_single_1.c
> @@ -1,6 +1,6 @@
> /* { dg-do compile } */
>
> -#pragma GCC target "+sme2"
> +#pragma GCC target "+sve2+sme2"
>
> #include <arm_sve.h>
>
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c
> index
> 01cd88f180b84c1b5644ae81eb892c920dc58bc0..0e88c1409f414180b50359fcddff9424151ca8c2
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target ("+sme2")
> +#pragma GCC target ("+sve2+sme2")
>
> void
> f1 (svbool_t pg, svint16_t s16, svint8_t s8, svuint8_t u8,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c
> index
> 937d992b0541bd842ced39e84e5b8f61f248ffce..2c60d50c6edaca1b43e423718b40f2abfce5c464
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target ("+sme2")
> +#pragma GCC target ("+sve2+sme2")
>
> void
> f1 (svbool_t pg, svint16_t s16, svuint16_t u16, svint32_t s32, svuint32_t
> u32,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c
> index
> 126a764c998e1c2b8e6ed7e3230f82066b6ec10b..dd90ebc309ed564c904177b7c293a507bfb30b61
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target ("+sme2")
> +#pragma GCC target ("+sve2+sme2")
>
> void
> f1 (svbool_t pg, svint16_t s16, svuint16_t u16, svint32_t s32, svuint32_t
> u32,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c
> index
> 17bed0c72dc5e6a877f41e78b1154d0084dd4d89..f53cc55be3bf4ec4069b3eafa74502253847bfb9
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target ("+sme2")
> +#pragma GCC target ("+sve2+sme2")
>
> void
> f1 (svbool_t pg, svint16_t s16, svuint16_t u16, svint32_t s32, svuint32_t
> u32,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c
> index
> d2a67c678dff591086e4aef9b72a86d0b2f76ac6..83c659d94fa8c133400eebb81e497076311c5f7d
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target ("+sme2")
> +#pragma GCC target ("+sve2+sme2")
>
> void
> f1 (svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c
> index
> 8307a2813dda49211b06b4cd3bb153231f4cd1c4..a361f7f5cb6b85ed1a0f2d118c84f4b705cc1f11
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target ("+sme2")
> +#pragma GCC target ("+sve2+sme2")
>
> void
> f1 (svbool_t pg, svint16_t s16, svint32_t s32, svuint32_t u32,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c
> index
> 181f509eee13eb7e70ddba019f5b2c36cd10a31f..959e2229ea9337aa7f188399b845b9214082a3a6
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target ("+sme2")
> +#pragma GCC target ("+sve2+sme2")
>
> void
> f1 (svbool_t pg, svint16_t s16, svint32_t s32, svuint32_t u32,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c
> index
> 8c8414ec55cf43ff10a0291f6f901f65d332646f..9cc42c0174eae9fd2b07bf2c533772c95cfd64bf
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target ("+sme2+nosme-i16i64")
> +#pragma GCC target ("+sve2+sme2+nosme-i16i64")
>
> void
> f1 (svint32x2_t s32x2, svuint32x2_t u32x2,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c
> index
> b00c04320bf06c72f62ec3f249952d235991180e..b289c9c871fe18d806b52de52da510b711cf6d4f
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target ("+sme2")
> +#pragma GCC target ("+sve2+sme2")
>
> void
> f1 (svbool_t pg, svuint16_t u16, svint8_t s8, svuint8_t u8,
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c
> index
> 600b7fc7959d1c8b42ea6c6d843349422677ad24..4f8ebf8c2c7ad703f9702bf2a58eb0bae995480b
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sve.h>
>
> -#pragma GCC target "+sme2"
> +#pragma GCC target "+sve2+sme2"
>
> void
> f1 (svbool_t pg, svcount_t pn, svuint8_t u8, svint16_t s16,
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/clamp_1.c
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/clamp_1.c
> index
> 07e22d2dd715da7457e4944a01e24bb9dcb4652e..958c40a2fc6b9a9045cc8c0cd3ddaf7a6e790c3f
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/clamp_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/clamp_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sve.h>
>
> -#pragma GCC target "+sme2"
> +#pragma GCC target "+sve2+sme2"
>
> void
> f1 (svcount_t pn, svfloat16_t f16, svint16_t s16, svfloat32_t f32,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c
> index
> 47077f7a4e5b48d6efb2f5b18994c2c0dd79f25f..4a4222c1e820e62bf780f6caa357694a2ddc4d30
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c
> @@ -3,7 +3,7 @@
> #include <arm_sve.h>
> #include <stdbool.h>
>
> -#pragma GCC target "+sme2"
> +#pragma GCC target "+sve2+sme2"
>
> enum signed_enum { SA = -1, SB };
> enum unsigned_enum { UA, UB };
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c
> index
> ca2a039b3903cccb7f98913004750a0086c22c81..aed92b57ac8ddf20d3ad77414b66b4a75e288837
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target ("+sme2")
> +#pragma GCC target ("+sve2+sme2")
>
> void
> f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c
> index
> e37d24ab6087f68da92f31ddeb5160f676b2d432..bb408682d6b4a5f14125fcf88636b3ecd85890f3
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target ("+sme2")
> +#pragma GCC target ("+sve2+sme2")
>
> void
> f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c
> index
> 7af3c6f9eef9cfade446583b0ef13c483ffc7d76..7d57bd1bdadcb8b14a43d1839b4c854a79ec2b03
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target ("+sme2")
> +#pragma GCC target ("+sve2+sme2")
>
> void
> f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c
> index
> 2efa2eb15ee0f713815b1d4a83dbdcbfb8a3cf87..cba11a423802e0364b66500033ce5d0ca28b5f3a
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target ("+sme2")
> +#pragma GCC target ("+sve2+sme2")
>
> void
> f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c
> index
> ab5602f0aa69e1a3a02546f48739e56ffb6f968f..685d0700400d1e21b6b82a8ee45192e258578478
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sve.h>
>
> -#pragma GCC target ("+sme2")
> +#pragma GCC target ("+sve2+sme2")
>
> void
> f1 (svboolx2_t pgx2,
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/storexn_1.c
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/storexn_1.c
> index
> 7ad4ca8a580ac9623dabc4ba32c0d978070f93c0..ba0096b4b4b36513fe7ebf66c14883e6b3833db9
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/storexn_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/storexn_1.c
> @@ -3,7 +3,7 @@
>
> #include <arm_sve.h>
>
> -#pragma GCC target "+sme2"
> +#pragma GCC target "+sve2+sme2"
>
> struct s { signed char x; };
>
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c
> index
> 6bdd3c06dc2b289186d27fa598b75e7a303e0432..c01710f45649b0d49229939004b2dc45d5770bc3
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sve.h>
>
> -#pragma GCC target ("arch=armv8.2-a+ssve-fp8fma")
> +#pragma GCC target ("arch=armv8.2-a+sve2+ssve-fp8fma")
>
> void
> f1 (svfloat16_t f16, svmfloat8_t f8, fpm_t fpm,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c
> index
> f6fce2f5c40f3da214da115d76ad7600f98749bc..fecaf98101a6a3d8ac4e16ae5608d1d7f0587861
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sve.h>
>
> -#pragma GCC target ("arch=armv8.2-a+ssve-fp8fma+ssve-fp8dot4+ssve-fp8dot2")
> +#pragma GCC target
> ("arch=armv8.2-a+sve2+ssve-fp8fma+ssve-fp8dot4+ssve-fp8dot2")
>
> void
> f1 (svfloat16_t f16, svmfloat8_t f8, fpm_t fpm,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c
> index
> b8968c878e1d315299c39a6dee7ee261cd4e9c43..5579e0d11b002f09944c19f6169236eeb3bf6851
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sve.h>
>
> -#pragma GCC target "+sme2"
> +#pragma GCC target "+sve2+sme2"
>
> void
> f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c
> index
> 85f8b45032d1a0d0d0a1bd1d8f42d98f65f94be3..e14ec71f0c3351a2cd396ebf1a4034b6e1641a52
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c
> @@ -1,6 +1,6 @@
> #include <arm_sve.h>
>
> -#pragma GCC target "+sme2"
> +#pragma GCC target "+sve2+sme2"
>
> void
> test (svbool_t pg, float f, svint8_t s8, svfloat32_t f32,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c
> index
> d312e857d8146ba0f362dc78602af9c8e371c2ff..e93cc64328f8f318924013371755594451ad2870
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c
> @@ -1,6 +1,6 @@
> #include <arm_sve.h>
>
> -#pragma GCC target "+sme2+fp8"
> +#pragma GCC target "+sve2+sme2+fp8"
>
> void
> test (svfloat16x2_t f16x2, svbfloat16x2_t bf16x2, svfloat32x2_t f32x2,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrowt_1.c
>
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrowt_1.c
> index
> ab97eef3472c8683176455f8034da990b67efb7c..da828f0aaf1720a47208f15c7965b4cf02cdb105
> 100644
> ---
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrowt_1.c
> +++
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrowt_1.c
> @@ -1,6 +1,6 @@
> #include <arm_sve.h>
>
> -#pragma GCC target "+sme2+fp8"
> +#pragma GCC target "+sve2+sme2+fp8"
>
> void
> test (svmfloat8_t f8, svfloat32x2_t f32x2, fpm_t fpm0,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_za_slice_1.c
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_za_slice_1.c
> index
> e02fe5405b1f0b0bc95b97c0ecfaf7f6020afcff..c3052a0a0f432d29420fdbe065e94158d94768f5
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_za_slice_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_za_slice_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target ("+sme2")
> +#pragma GCC target ("+sve2+sme2")
>
> void
> f1 (svbool_t pg, svint32_t s32, svint16x2_t s16x2, svint32x2_t s32x2,
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c
> index
> f478945562c8dcc154f88c1fac658092f07cba3e..e9656bc69afcd33b3c51fc86bdcae71b5379e382
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c
> @@ -1,6 +1,6 @@
> #include <arm_sve.h>
>
> -#pragma GCC target "+sme2"
> +#pragma GCC target "+sve2+sme2"
>
> void
> test (svfloat32_t f32, svfloat32x2_t f32x2, svfloat32x3_t f32x3,
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_1.c
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_1.c
> index
> 3a45b58b023490e6e33c4f5285c0422530f8f827..95ead96a579bbf6c30b5d1e4163c644730cb702a
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target "+sme2"
> +#pragma GCC target "+sve2+sme2"
>
> void
> f1 (svint8_t s8, svint8x2_t s8x2, svint8x3_t s8x3, svint8x4_t s8x4,
> diff --git
> a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c
> b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c
> index
> dedd4b16ea2450e88a5177c4a00350a70a913245..dae88926e9852a3597e181d10a8a723c72ad01d5
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c
> @@ -2,7 +2,7 @@
>
> #include <arm_sme.h>
>
> -#pragma GCC target "+sme2"
> +#pragma GCC target "+sve2+sme2"
>
> void
> f1 (svint8_t s8, svint8x2_t s8x2, svint8x3_t s8x3, svint8x4_t s8x4,
