Apologies for the delay, had been waiting on some other relevant patches to go in to make sure we didn't break any valid existing behaviours. It should all be working properly now. I think I've also addressed all your comments. Most notable change is that it now uses the 'sorry' mechanism.

Bootstrapped and regression tested on aarch64-none-linux-gnu.


aarch64: remove SVE2 requirement from SME and diagnose it as unsupported

As per the AArch64 ISA FEAT_SME does not require FEAT_SVE2, so we are removing
that false dependency in GCC.  However, we chose for now to not support this
combination of features and will diagnose the combination of FEAT_SME without FEAT_SVE2 as unsupported by GCC. We may choose to support this in the future.

gcc/ChangeLog:

        * config/aarch64/aarch64-arches.def (SME): Remove SVE2 as prerequisite
        and add in FCMA and F16FML.
        * config/aarch64/aarch64.cc (aarch64_override_options_internal):
        Diagnose use of SME without SVE2.
        * doc/invoke.texi (sme): Document that this can only be used with the
        sve2 extension.

gcc/testsuite/ChangeLog:

        * gcc.target/aarch64/no-sve-with-sme-1.c: New.
        * gcc.target/aarch64/no-sve-with-sme-2.c: New.
        * gcc.target/aarch64/no-sve-with-sme-3.c: New.
        * gcc.target/aarch64/sme/streaming_mode_4.c: Diagnose new error.
        * gcc.target/aarch64/pragma_cpp_predefs_4.c: Pass +sve2 to existing
        +sme pragma.
        * gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/binary_single_1.c: Likewise.
        * 
gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c:
        * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c:
        Likewise.
* gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c: Likewise.
        * gcc.target/aarch64/sve/acle/general-c/clamp_1.c: Likewise.
        * gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/storexn_1.c: Likewise.
        * gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c:
        Likewise.
* gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c: Likewise.
        * gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c: Likewise.
        * gcc.target/aarch64/sve/acle/general-c/write_za_1.c: Likewise.
        * gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c: Likewise.
        * gcc.target/aarch64/sve2/acle/asm/mlalb_lane_mf8.c: Likewise.
        * gcc.target/aarch64/sve2/acle/asm/mlalb_mf8.c: Likewise.
        * gcc.target/aarch64/sve2/acle/asm/mlallbb_lane_mf8.c: Likewise.
        * gcc.target/aarch64/sve2/acle/asm/mlallbb_mf8.c: Likewise.
        * gcc.target/aarch64/sve2/acle/asm/mlallbt_lane_mf8.c: Likewise.
        * gcc.target/aarch64/sve2/acle/asm/mlallbt_mf8.c: Likewise.
        * gcc.target/aarch64/sve2/acle/asm/mlalltb_lane_mf8.c: Likewise.
        * gcc.target/aarch64/sve2/acle/asm/mlalltb_mf8.c: Likewise.
        * gcc.target/aarch64/sve2/acle/asm/mlalltt_lane_mf8.c: Likewise.
        * gcc.target/aarch64/sve2/acle/asm/mlalltt_mf8.c: Likewise.
        * gcc.target/aarch64/sve2/acle/asm/mlalt_lane_mf8.c: Likewise.
        * gcc.target/aarch64/sve2/acle/asm/mlalt_mf8.c: Likewise.




On 04/10/2024 13:08, Kyrylo Tkachov wrote:
Hi Andre,

On 2 Oct 2024, at 19:13, Andre Vieira <andre.simoesdiasvie...@arm.com> wrote:

External email: Use caution opening links or attachments


As per the AArch64 ISA FEAT_SME does not require FEAT_SVE2, so we are removing
that false dependency in GCC.  However, we chose for now to not support this
combination of features and will diagnose the combination of FEAT_SME without
FEAT_SVE2 as unsupported by GCC.  We may choose to support this in the future.

gcc/ChangeLog:

        * config/aarch64/aarch64-arches.def (SME): Remove SVE2 as prerequisite
        and add in FCMA and F16FML.
        * config/aarch64/aarch64.cc (aarch64_override_options): Diagnose use of
        SME without SVE2.

gcc/testsuite/ChangeLog:

        * gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c:
        Pass +sve2 to existing +sme pragma.
        * gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/binary_single_1.c: Likewise.
        * gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c: Likewise.
        * gcc.target/aarch64/sve/acle/general-c/clamp_1.c: Likewise.
        * gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/storexn_1.c: Likewise.
        * gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c:
        Likewise.
        * gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c: Likewise.
        * gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c: Likewise.
---
gcc/config/aarch64/aarch64-option-extensions.def              | 3 ++-
gcc/config/aarch64/aarch64.cc                                 | 4 ++++
.../aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c    | 2 +-
.../aarch64/sve/acle/general-c/binary_opt_single_n_2.c        | 2 +-
.../gcc.target/aarch64/sve/acle/general-c/binary_single_1.c   | 2 +-
.../gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c        | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/clamp_1.c | 2 +-
.../aarch64/sve/acle/general-c/compare_scalar_count_1.c       | 2 +-
.../aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c   | 2 +-
.../gcc.target/aarch64/sve/acle/general-c/storexn_1.c         | 2 +-
.../aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c     | 2 +-
.../gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c | 2 +-
.../gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c         | 2 +-
13 files changed, 17 insertions(+), 12 deletions(-)


diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 68913beaee2..bc2023da180 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -18998,6 +18998,10 @@ aarch64_override_options (void)
       while processing functions with potential target attributes.  */
    target_option_default_node = target_option_current_node
      = build_target_option_node (&global_options, &global_options_set);
+
+  if (TARGET_SME && !TARGET_SVE2)
+    warning (0, "this gcc version does not guarantee full support for +sme"
+ " without +sve2");
  }

Beyond my comments on the cover letter, if you do intend to give some message 
here anyway, this can be more fancy :)
You can use %qs to quote the +sme and +sve2 strings and I don’t think we 
usually refer to GCC itself from warnings.
I think a passive voice would fit better.

Regardless of what we do for the warning this restriction should be documented 
in doc/invoke.texi if we end up having it for the GCC 15.1 release.
Thanks,
Kyrill
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def 
b/gcc/config/aarch64/aarch64-option-extensions.def
index 
aa8d315c240fbd25b49008b131cc09f04001eb80..8603836de01588b8db417289f842f911567288ea
 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -207,7 +207,7 @@ AARCH64_FMV_FEATURE("sve2-sm4", SVE_SM4, (SVE2_SM4))
 
 AARCH64_OPT_EXTENSION("sve2p1", SVE2p1, (SVE2), (), (), "sve2p1")
 
-AARCH64_OPT_FMV_EXTENSION("sme", SME, (BF16, SVE2), (), (), "sme")
+AARCH64_OPT_FMV_EXTENSION("sme", SME, (BF16, FCMA, F16FML), (), (), "sme")
 
 AARCH64_OPT_EXTENSION("memtag", MEMTAG, (), (), (), "")
 
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 
36b65df50c57267d9c18e430665c411f1bf3cc24..c9f37bd70cbccef70f383f873c97b2be58c938dc
 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -18886,6 +18886,9 @@ aarch64_override_options_internal (struct gcc_options 
*opts)
     SET_OPTION_IF_UNSET (opts, &global_options_set, param_fully_pipelined_fma,
                         1);
 
+  if (TARGET_SME && !TARGET_SVE2)
+    sorry ("no support for %qs without %qs", "sme", "sve2");
+
   aarch64_override_options_after_change_1 (opts);
 }
 
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 
4fbb4cda101ebd14891a3ad80aa5b1bc069b45c6..3754e468a05b3ae554b71adb4cf60068d5249507
 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -22068,7 +22068,8 @@ Enable the Pointer Authentication Extension.
 @item cssc
 Enable the Common Short Sequence Compression instructions.
 @item sme
-Enable the Scalable Matrix Extension.
+Enable the Scalable Matrix Extension.  This can only be used with the sve2
+extension.
 @item sme-i16i64
 Enable the FEAT_SME_I16I64 extension to SME.  This also enables SME
 instructions.
diff --git a/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-1.c 
b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-1.c
new file mode 100644
index 
0000000000000000000000000000000000000000..e5bb2d95f65fc6d52c39d97187353e056cbb38a8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-1.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-skip-if "Do not override mcpu or march" { *-*-* } { -mcpu=* -march=* } 
{ "" } } */
+/* { dg-options { "-march=armv8-a+sme" } } */
+/* { dg-message "sorry, unimplemented: no support for 'sme' without 'sve2'" "" 
{ target *-*-* } 0 } */
+int main (void)
+{
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-2.c 
b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-2.c
new file mode 100644
index 
0000000000000000000000000000000000000000..c5440aeb3da1760848af8cb43317e85058462487
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-2.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-skip-if "Do not override mcpu or march" { *-*-* } { -mcpu=* -march=* } 
{ "" } } */
+/* { dg-message "sorry, unimplemented: no support for 'sme' without 'sve2'" "" 
{ target *-*-* } 0 } */
+
+#pragma GCC target ("arch=armv8.2-a+ssve-fp8fma") 
+
+int main (void)
+{
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-3.c 
b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-3.c
new file mode 100644
index 
0000000000000000000000000000000000000000..7a873fa2396a4129225bae8ac8797c86fac17261
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-3.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-skip-if "Do not override mcpu or march" { *-*-* } { -mcpu=* -march=* } 
{ "" } } */
+/* { dg-message "sorry, unimplemented: no support for 'sme' without 'sve2'" "" 
{ target *-*-* } 0 } */
+
+int __attribute__ ((target( "arch=armv8.2-a+ssve-fp8fma"))) main (void)
+{
+  return 0;
+}
+
diff --git a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c 
b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
index 
97d68b94512e1ffdd5ceb484a6378b3a1ec9d115..dcac6d5eb6584d10a0d8eda730a100e24821be1a
 100644
--- a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
+++ b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
@@ -46,7 +46,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+sme"
+#pragma GCC target "+sve2+sme"
 #ifndef __ARM_FEATURE_SME
 #error Foo
 #endif
@@ -66,7 +66,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+nothing+sme"
+#pragma GCC target "+nothing+sve2+sme"
 #ifdef __ARM_FEATURE_SME_I16I64
 #error Foo
 #endif
@@ -80,7 +80,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+nothing+sme-i16i64"
+#pragma GCC target "+nothing+sve2+sme-i16i64"
 #ifndef __ARM_FEATURE_SME_I16I64
 #error Foo
 #endif
@@ -91,7 +91,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+nothing+sme-b16b16"
+#pragma GCC target "+nothing+sve2+sme-b16b16"
 #ifndef __ARM_FEATURE_SME_B16B16
 #error Foo
 #endif
@@ -105,7 +105,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+nothing+sme-f16f16"
+#pragma GCC target "+nothing+sve2+sme-f16f16"
 #ifndef __ARM_FEATURE_SME_F16F16
 #error Foo
 #endif
@@ -116,7 +116,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+nothing+sme-f64f64"
+#pragma GCC target "+nothing+sve2+sme-f64f64"
 #ifndef __ARM_FEATURE_SME_F64F64
 #error Foo
 #endif
@@ -160,7 +160,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+nothing+sve-b16b16+sme2"
+#pragma GCC target "+nothing+sve2+sve-b16b16+sme2"
 #ifndef __ARM_FEATURE_SVE_B16B16
 #error Foo
 #endif
@@ -168,7 +168,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+nothing+sme2p1"
+#pragma GCC target "+nothing+sve2+sme2p1"
 #ifndef __ARM_FEATURE_SME
 #error Foo
 #endif
diff --git a/gcc/testsuite/gcc.target/aarch64/sme/streaming_mode_4.c 
b/gcc/testsuite/gcc.target/aarch64/sme/streaming_mode_4.c
index 
50e92f2e18a8f09829ce20d889a0fe7fe51bad7f..bc846c010a5ffb8d3886a840528db2e1a82ecfb4
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sme/streaming_mode_4.c
+++ b/gcc/testsuite/gcc.target/aarch64/sme/streaming_mode_4.c
@@ -1,4 +1,5 @@
 // { dg-options "-mgeneral-regs-only" }
+/* { dg-message "sorry, unimplemented: no support for 'sme' without 'sve2'" "" 
{ target *-*-* } 0 } */
 
 void sc_a () [[arm::streaming_compatible]] {}
 void s_a () [[arm::streaming]] {} // { dg-error "streaming functions require 
the ISA extension 'sme'" }
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c
index 
976d5af7f2373d826bfdb7fcef0a6d267f172db4..7150d37a2aa78e79ab7ae1852cea7c435dda8be1
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 #include <arm_sve.h>
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c
index 
5cc8a4c5c50fcd663db2c43c16ae5aec9b1b14a1..2823264edbdac1988cfbf9cc70bfd89b567f3459
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 #include <arm_sve.h>
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_single_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_single_1.c
index 
aa7633bb322f331ce57f293bfda2c7e124e63873..52f2c090f57b5817f8f7d1938c873f064a0af631
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_single_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_single_1.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 #include <arm_sve.h>
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c
index 
01cd88f180b84c1b5644ae81eb892c920dc58bc0..0e88c1409f414180b50359fcddff9424151ca8c2
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint16_t s16, svint8_t s8, svuint8_t u8,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c
index 
937d992b0541bd842ced39e84e5b8f61f248ffce..2c60d50c6edaca1b43e423718b40f2abfce5c464
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint16_t s16, svuint16_t u16, svint32_t s32, svuint32_t u32,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c
index 
126a764c998e1c2b8e6ed7e3230f82066b6ec10b..dd90ebc309ed564c904177b7c293a507bfb30b61
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint16_t s16, svuint16_t u16, svint32_t s32, svuint32_t u32,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c
index 
17bed0c72dc5e6a877f41e78b1154d0084dd4d89..f53cc55be3bf4ec4069b3eafa74502253847bfb9
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint16_t s16, svuint16_t u16, svint32_t s32, svuint32_t u32,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c
index 
d2a67c678dff591086e4aef9b72a86d0b2f76ac6..83c659d94fa8c133400eebb81e497076311c5f7d
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c
index 
8307a2813dda49211b06b4cd3bb153231f4cd1c4..a361f7f5cb6b85ed1a0f2d118c84f4b705cc1f11
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint16_t s16, svint32_t s32, svuint32_t u32,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c
index 
181f509eee13eb7e70ddba019f5b2c36cd10a31f..959e2229ea9337aa7f188399b845b9214082a3a6
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint16_t s16, svint32_t s32, svuint32_t u32,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c
index 
8c8414ec55cf43ff10a0291f6f901f65d332646f..9cc42c0174eae9fd2b07bf2c533772c95cfd64bf
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2+nosme-i16i64")
+#pragma GCC target ("+sve2+sme2+nosme-i16i64")
 
 void
 f1 (svint32x2_t s32x2, svuint32x2_t u32x2,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c
index 
b00c04320bf06c72f62ec3f249952d235991180e..b289c9c871fe18d806b52de52da510b711cf6d4f
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svuint16_t u16, svint8_t s8, svuint8_t u8,
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c
index 
600b7fc7959d1c8b42ea6c6d843349422677ad24..4f8ebf8c2c7ad703f9702bf2a58eb0bae995480b
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c
@@ -2,7 +2,7 @@
 
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 void
 f1 (svbool_t pg, svcount_t pn, svuint8_t u8, svint16_t s16,
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/clamp_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/clamp_1.c
index 
07e22d2dd715da7457e4944a01e24bb9dcb4652e..958c40a2fc6b9a9045cc8c0cd3ddaf7a6e790c3f
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/clamp_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/clamp_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 void
 f1 (svcount_t pn, svfloat16_t f16, svint16_t s16, svfloat32_t f32,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c
index 
47077f7a4e5b48d6efb2f5b18994c2c0dd79f25f..4a4222c1e820e62bf780f6caa357694a2ddc4d30
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c
@@ -3,7 +3,7 @@
 #include <arm_sve.h>
 #include <stdbool.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 enum signed_enum { SA = -1, SB };
 enum unsigned_enum { UA, UB };
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c
index 
ca2a039b3903cccb7f98913004750a0086c22c81..aed92b57ac8ddf20d3ad77414b66b4a75e288837
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c
index 
e37d24ab6087f68da92f31ddeb5160f676b2d432..bb408682d6b4a5f14125fcf88636b3ecd85890f3
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c
index 
7af3c6f9eef9cfade446583b0ef13c483ffc7d76..7d57bd1bdadcb8b14a43d1839b4c854a79ec2b03
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c
index 
2efa2eb15ee0f713815b1d4a83dbdcbfb8a3cf87..cba11a423802e0364b66500033ce5d0ca28b5f3a
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c
index 
ab5602f0aa69e1a3a02546f48739e56ffb6f968f..685d0700400d1e21b6b82a8ee45192e258578478
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sve.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svboolx2_t pgx2,
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/storexn_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/storexn_1.c
index 
7ad4ca8a580ac9623dabc4ba32c0d978070f93c0..ba0096b4b4b36513fe7ebf66c14883e6b3833db9
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/storexn_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/storexn_1.c
@@ -3,7 +3,7 @@
 
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 struct s { signed char x; };
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c
index 
6bdd3c06dc2b289186d27fa598b75e7a303e0432..c01710f45649b0d49229939004b2dc45d5770bc3
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sve.h>
 
-#pragma GCC target ("arch=armv8.2-a+ssve-fp8fma")
+#pragma GCC target ("arch=armv8.2-a+sve2+ssve-fp8fma")
 
 void
 f1 (svfloat16_t f16, svmfloat8_t f8, fpm_t fpm, 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c
index 
f6fce2f5c40f3da214da115d76ad7600f98749bc..fecaf98101a6a3d8ac4e16ae5608d1d7f0587861
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sve.h>
 
-#pragma GCC target ("arch=armv8.2-a+ssve-fp8fma+ssve-fp8dot4+ssve-fp8dot2")
+#pragma GCC target 
("arch=armv8.2-a+sve2+ssve-fp8fma+ssve-fp8dot4+ssve-fp8dot2")
 
 void
 f1 (svfloat16_t f16, svmfloat8_t f8, fpm_t fpm, 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c
index 
b8968c878e1d315299c39a6dee7ee261cd4e9c43..5579e0d11b002f09944c19f6169236eeb3bf6851
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 void
 f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c
index 
85f8b45032d1a0d0d0a1bd1d8f42d98f65f94be3..e14ec71f0c3351a2cd396ebf1a4034b6e1641a52
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c
@@ -1,6 +1,6 @@
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 void
 test (svbool_t pg, float f, svint8_t s8, svfloat32_t f32,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c
index 
d312e857d8146ba0f362dc78602af9c8e371c2ff..e93cc64328f8f318924013371755594451ad2870
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c
@@ -1,6 +1,6 @@
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2+fp8"
+#pragma GCC target "+sve2+sme2+fp8"
 
 void
 test (svfloat16x2_t f16x2, svbfloat16x2_t bf16x2, svfloat32x2_t f32x2,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrowt_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrowt_1.c
index 
ab97eef3472c8683176455f8034da990b67efb7c..da828f0aaf1720a47208f15c7965b4cf02cdb105
 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrowt_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrowt_1.c
@@ -1,6 +1,6 @@
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2+fp8"
+#pragma GCC target "+sve2+sme2+fp8"
 
 void
 test (svmfloat8_t f8, svfloat32x2_t f32x2, fpm_t fpm0,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_za_slice_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_za_slice_1.c
index 
e02fe5405b1f0b0bc95b97c0ecfaf7f6020afcff..c3052a0a0f432d29420fdbe065e94158d94768f5
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_za_slice_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_za_slice_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint32_t s32, svint16x2_t s16x2, svint32x2_t s32x2,
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c
index 
f478945562c8dcc154f88c1fac658092f07cba3e..e9656bc69afcd33b3c51fc86bdcae71b5379e382
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c
@@ -1,6 +1,6 @@
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 void
 test (svfloat32_t f32, svfloat32x2_t f32x2, svfloat32x3_t f32x3,
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_1.c
index 
3a45b58b023490e6e33c4f5285c0422530f8f827..95ead96a579bbf6c30b5d1e4163c644730cb702a
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 void
 f1 (svint8_t s8, svint8x2_t s8x2, svint8x3_t s8x3, svint8x4_t s8x4,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c
index 
dedd4b16ea2450e88a5177c4a00350a70a913245..dae88926e9852a3597e181d10a8a723c72ad01d5
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 void
 f1 (svint8_t s8, svint8x2_t s8x2, svint8x3_t s8x3, svint8x4_t s8x4,
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalb_lane_mf8.c 
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalb_lane_mf8.c
index 
39a272f60e0e0d6b8cd396ac1131f68352182670..f952af025efcc1865c3711cebbac4cae57c934a3
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalb_lane_mf8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalb_lane_mf8.c
@@ -6,7 +6,7 @@
 
 #pragma GCC target "+fp8fma"
 #ifdef STREAMING_COMPATIBLE
-#pragma GCC target "+ssve-fp8fma"
+#pragma GCC target "+sve2+ssve-fp8fma"
 #endif
 
 /*
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalb_mf8.c 
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalb_mf8.c
index 
424640031fb62224ec410e4c79eaa3046c0a43b2..2d359fca20b85d907d802f4b6d5471b8484bcbdb
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalb_mf8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalb_mf8.c
@@ -6,7 +6,7 @@
 
 #pragma GCC target "+fp8fma"
 #ifdef STREAMING_COMPATIBLE
-#pragma GCC target "+ssve-fp8fma"
+#pragma GCC target "+sve2+ssve-fp8fma"
 #endif
 
 /*
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbb_lane_mf8.c 
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbb_lane_mf8.c
index 
2d084515c856d9d22482696c5ebaa1092bf165e5..16f4d9e492f2696497cdb27f5b06abf2494f6528
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbb_lane_mf8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbb_lane_mf8.c
@@ -6,7 +6,7 @@
 
 #pragma GCC target "+fp8fma"
 #ifdef STREAMING_COMPATIBLE
-#pragma GCC target "+ssve-fp8fma"
+#pragma GCC target "+sve2+ssve-fp8fma"
 #endif
 
 /*
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbb_mf8.c 
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbb_mf8.c
index 
543cd9030d54c59b5e1ed4ab71248fe2b20e6056..453a1a7bc2fb4a516cf8c243e60174fc34c39163
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbb_mf8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbb_mf8.c
@@ -6,7 +6,7 @@
 
 #pragma GCC target "+fp8fma"
 #ifdef STREAMING_COMPATIBLE
-#pragma GCC target "+ssve-fp8fma"
+#pragma GCC target "+sve2+ssve-fp8fma"
 #endif
 
 /*
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbt_lane_mf8.c 
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbt_lane_mf8.c
index 
6dadbcf2e173f43a1818e74fa0bbe804b1b2cbf8..2e962ac7283afcc94a39675576db6bf6dc6104bb
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbt_lane_mf8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbt_lane_mf8.c
@@ -6,7 +6,7 @@
 
 #pragma GCC target "+fp8fma"
 #ifdef STREAMING_COMPATIBLE
-#pragma GCC target "+ssve-fp8fma"
+#pragma GCC target "+sve2+ssve-fp8fma"
 #endif
 
 /*
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbt_mf8.c 
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbt_mf8.c
index 
aa8299c66b380d20d832babf10bb3d25858a891e..cd80b9a99a78c3efec7d576966b0259263c95743
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbt_mf8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlallbt_mf8.c
@@ -6,7 +6,7 @@
 
 #pragma GCC target "+fp8fma"
 #ifdef STREAMING_COMPATIBLE
-#pragma GCC target "+ssve-fp8fma"
+#pragma GCC target "+sve2+ssve-fp8fma"
 #endif
 
 /*
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltb_lane_mf8.c 
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltb_lane_mf8.c
index 
6b9e06c7550c481b97e4ea47de04ac8aa12c3d52..9fdfffc797cbd7c54a77c4c33972dd0320bedb88
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltb_lane_mf8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltb_lane_mf8.c
@@ -6,7 +6,7 @@
 
 #pragma GCC target "+fp8fma"
 #ifdef STREAMING_COMPATIBLE
-#pragma GCC target "+ssve-fp8fma"
+#pragma GCC target "+sve2+ssve-fp8fma"
 #endif
 
 /*
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltb_mf8.c 
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltb_mf8.c
index 
a921dbd188168e7f74d0c91c1c7156c16d1706c0..9ef101266219b6384e7af94e804e96d6c525a8d0
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltb_mf8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltb_mf8.c
@@ -6,7 +6,7 @@
 
 #pragma GCC target "+fp8fma"
 #ifdef STREAMING_COMPATIBLE
-#pragma GCC target "+ssve-fp8fma"
+#pragma GCC target "+sve2+ssve-fp8fma"
 #endif
 
 /*
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltt_lane_mf8.c 
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltt_lane_mf8.c
index 
f33c4fe79658700df68e75b35b0f25b128dc410f..72060a9d4374a3f6e1f82262bf8a567921cbc40d
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltt_lane_mf8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltt_lane_mf8.c
@@ -6,7 +6,7 @@
 
 #pragma GCC target "+fp8fma"
 #ifdef STREAMING_COMPATIBLE
-#pragma GCC target "+ssve-fp8fma"
+#pragma GCC target "+sve2+ssve-fp8fma"
 #endif
 
 /*
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltt_mf8.c 
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltt_mf8.c
index 
5cd6beb348ac34cc514db8bc62d1e509751bc256..0d1bc443ae76a96a3e0b88ef487374e27041dff6
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltt_mf8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalltt_mf8.c
@@ -6,7 +6,7 @@
 
 #pragma GCC target "+fp8fma"
 #ifdef STREAMING_COMPATIBLE
-#pragma GCC target "+ssve-fp8fma"
+#pragma GCC target "+sve2+ssve-fp8fma"
 #endif
 
 /*
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalt_lane_mf8.c 
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalt_lane_mf8.c
index 
604d3325d605e76d73ee37fba1784b9abd21a8ac..03562d31687b36b3d3408ba1ae084e939aae6d49
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalt_lane_mf8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalt_lane_mf8.c
@@ -6,7 +6,7 @@
 
 #pragma GCC target "+fp8fma"
 #ifdef STREAMING_COMPATIBLE
-#pragma GCC target "+ssve-fp8fma"
+#pragma GCC target "+sve2+ssve-fp8fma"
 #endif
 
 /*
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalt_mf8.c 
b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalt_mf8.c
index 
3a305d31cb8d1ab0e64e776d318f16b534a2a123..91794a2ebfcda3c3b2b1993fbd846f87ed906ef2
 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalt_mf8.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalt_mf8.c
@@ -6,7 +6,7 @@
 
 #pragma GCC target "+fp8fma"
 #ifdef STREAMING_COMPATIBLE
-#pragma GCC target "+ssve-fp8fma"
+#pragma GCC target "+sve2+ssve-fp8fma"
 #endif
 
 /*

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