"Andre Vieira (lists)" <andre.simoesdiasvie...@arm.com> writes:
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index
> 4fbb4cda101ebd14891a3ad80aa5b1bc069b45c6..3754e468a05b3ae554b71adb4cf60068d5249507
> 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -22068,7 +22068,8 @@ Enable the Pointer Authentication Extension.
> @item cssc
> Enable the Common Short Sequence Compression instructions.
> @item sme
> -Enable the Scalable Matrix Extension.
> +Enable the Scalable Matrix Extension. This can only be used with the sve2
I suppose this should be either SVE2 or @samp{sve2}, depending on whether
it's naming the extension or the feature identifier.
> +extension.
> @item sme-i16i64
> Enable the FEAT_SME_I16I64 extension to SME. This also enables SME
> instructions.
> [...]
> diff --git a/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-2.c
> b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-2.c
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..c5440aeb3da1760848af8cb43317e85058462487
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-2.c
> @@ -0,0 +1,10 @@
> +/* { dg-do compile } */
> +/* { dg-skip-if "Do not override mcpu or march" { *-*-* } { -mcpu=* -march=*
> } { "" } } */
> +/* { dg-message "sorry, unimplemented: no support for 'sme' without 'sve2'"
> "" { target *-*-* } 0 } */
> +
> +#pragma GCC target ("arch=armv8.2-a+ssve-fp8fma")
> +
> +int main (void)
> +{
> + return 0;
> +}
> diff --git a/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-3.c
> b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-3.c
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..7a873fa2396a4129225bae8ac8797c86fac17261
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-3.c
> @@ -0,0 +1,9 @@
> +/* { dg-do compile } */
> +/* { dg-skip-if "Do not override mcpu or march" { *-*-* } { -mcpu=* -march=*
> } { "" } } */
> +/* { dg-message "sorry, unimplemented: no support for 'sme' without 'sve2'"
> "" { target *-*-* } 0 } */
> +
> +int __attribute__ ((target( "arch=armv8.2-a+ssve-fp8fma"))) main (void)
> +{
> + return 0;
> +}
Is the skip necessary for these two tests? I would expect them to work
even with -march and -mcpu flags, given that the tests override the
architecture completely.
The tests look good with the skips removed.
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalb_lane_mf8.c
> b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalb_lane_mf8.c
> index
> 39a272f60e0e0d6b8cd396ac1131f68352182670..f952af025efcc1865c3711cebbac4cae57c934a3
> 100644
> --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalb_lane_mf8.c
> +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/mlalb_lane_mf8.c
> @@ -6,7 +6,7 @@
>
> #pragma GCC target "+fp8fma"
> #ifdef STREAMING_COMPATIBLE
> -#pragma GCC target "+ssve-fp8fma"
> +#pragma GCC target "+sve2+ssve-fp8fma"
Is the +sve2 necessary here? The test is in the sve2/ directory and
so I would expect sve2 to be enabled already.
Same for the other sve2/ tests.
LGTM otherwise, with the change mentioned yesterday.
Thanks,
Richard
