This patch set implements the proposal from riscv-c-api-doc[1]. It adds two constraints and one modifier with the goal of improving the user experience for `.insn`, making it easier for users to experiment with new ISA extensions.
A quick summary of this patch set: - Add R constraint for even-odd pairs of general-purpose registers. - Add cr and cf constraints for RVC-compatible registers. - Add N modifier for the raw encoding of a register. The c constraint and N modifier were already in use before, but only internally. Therefore, I believe it is safe to rename them for broader use. [1] https://github.com/riscv-non-isa/riscv-c-api-doc/pull/92 Kito Cheng (5): RISC-V: Rename constraint c0* to k0* RISC-V: Add cr and cf constraint RISC-V Rename internal operand modifier N to n RISC-V: Implment N modifier for printing the register number rather than the register name RISC-V: Add new constraint R for register even-odd pairs gcc/config/riscv/constraints.md | 20 +- gcc/config/riscv/corev.md | 14 +- gcc/config/riscv/riscv-v.cc | 2 +- gcc/config/riscv/riscv.cc | 27 +- gcc/config/riscv/riscv.h | 6 + gcc/config/riscv/riscv.md | 2 +- gcc/config/riscv/vector-iterators.md | 444 +++++++++--------- gcc/doc/extend.texi | 1 + gcc/doc/md.texi | 10 + .../gcc.target/riscv/constraint-cf-zfinx.c | 14 + .../gcc.target/riscv/constraint-cf.c | 14 + .../gcc.target/riscv/constraint-cr.c | 13 + .../gcc.target/riscv/modifier-N-fpr.c | 16 + .../gcc.target/riscv/modifier-N-vr.c | 18 + gcc/testsuite/gcc.target/riscv/modifier-N.c | 16 + 15 files changed, 379 insertions(+), 238 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/constraint-cf-zfinx.c create mode 100644 gcc/testsuite/gcc.target/riscv/constraint-cf.c create mode 100644 gcc/testsuite/gcc.target/riscv/constraint-cr.c create mode 100644 gcc/testsuite/gcc.target/riscv/modifier-N-fpr.c create mode 100644 gcc/testsuite/gcc.target/riscv/modifier-N-vr.c create mode 100644 gcc/testsuite/gcc.target/riscv/modifier-N.c -- 2.34.1
