Factorize vmovnbq vmovntq vqmovnbq vqmovntq vqmovunbq vqmovuntq so that they use the same pattern.
2022-09-08 Christophe Lyon <christophe.l...@arm.com> gcc/ * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New. (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb, vqmovunt. (isu): Likewise. (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S, VQMOVUNTQ_S. * config/arm/mve.md (mve_vmovnbq_<supf><mode>) (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>) (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>) (mve_vqmovuntq_s<mode>): Merge into ... (@mve_<mve_insn>q_<supf><mode>): ... this. (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>) (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>) (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ... (@mve_<mve_insn>q_m_<supf><mode>): ... this. --- gcc/config/arm/iterators.md | 46 +++++++++ gcc/config/arm/mve.md | 180 ++++-------------------------------- 2 files changed, 64 insertions(+), 162 deletions(-) diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 0b4f69ee874..20735284979 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -578,6 +578,24 @@ (define_int_iterator MVE_FP_CREATE_ONLY [ VCREATEQ_F ]) +(define_int_iterator MVE_MOVN [ + VMOVNBQ_S VMOVNBQ_U + VMOVNTQ_S VMOVNTQ_U + VQMOVNBQ_S VQMOVNBQ_U + VQMOVNTQ_S VQMOVNTQ_U + VQMOVUNBQ_S + VQMOVUNTQ_S + ]) + +(define_int_iterator MVE_MOVN_M [ + VMOVNBQ_M_S VMOVNBQ_M_U + VMOVNTQ_M_S VMOVNTQ_M_U + VQMOVNBQ_M_S VQMOVNBQ_M_U + VQMOVNTQ_M_S VQMOVNTQ_M_U + VQMOVUNBQ_M_S + VQMOVUNTQ_M_S + ]) + (define_code_attr mve_addsubmul [ (minus "vsub") (mult "vmul") @@ -613,6 +631,10 @@ (define_int_attr mve_insn [ (VMINQ_M_S "vmin") (VMINQ_M_U "vmin") (VMLAQ_M_N_S "vmla") (VMLAQ_M_N_U "vmla") (VMLASQ_M_N_S "vmlas") (VMLASQ_M_N_U "vmlas") + (VMOVNBQ_M_S "vmovnb") (VMOVNBQ_M_U "vmovnb") + (VMOVNBQ_S "vmovnb") (VMOVNBQ_U "vmovnb") + (VMOVNTQ_M_S "vmovnt") (VMOVNTQ_M_U "vmovnt") + (VMOVNTQ_S "vmovnt") (VMOVNTQ_U "vmovnt") (VMULHQ_M_S "vmulh") (VMULHQ_M_U "vmulh") (VMULHQ_S "vmulh") (VMULHQ_U "vmulh") (VMULQ_M_N_S "vmul") (VMULQ_M_N_U "vmul") (VMULQ_M_N_F "vmul") @@ -639,6 +661,14 @@ (define_int_attr mve_insn [ (VQDMULHQ_M_S "vqdmulh") (VQDMULHQ_N_S "vqdmulh") (VQDMULHQ_S "vqdmulh") + (VQMOVNBQ_M_S "vqmovnb") (VQMOVNBQ_M_U "vqmovnb") + (VQMOVNBQ_S "vqmovnb") (VQMOVNBQ_U "vqmovnb") + (VQMOVNTQ_M_S "vqmovnt") (VQMOVNTQ_M_U "vqmovnt") + (VQMOVNTQ_S "vqmovnt") (VQMOVNTQ_U "vqmovnt") + (VQMOVUNBQ_M_S "vqmovunb") + (VQMOVUNBQ_S "vqmovunb") + (VQMOVUNTQ_M_S "vqmovunt") + (VQMOVUNTQ_S "vqmovunt") (VQNEGQ_M_S "vqneg") (VQNEGQ_S "vqneg") (VQRDMLADHQ_M_S "vqrdmladh") @@ -723,8 +753,20 @@ (define_int_attr isu [ (VCLSQ_M_S "s") (VCLZQ_M_S "i") (VCLZQ_M_U "i") + (VMOVNBQ_M_S "i") (VMOVNBQ_M_U "i") + (VMOVNBQ_S "i") (VMOVNBQ_U "i") + (VMOVNTQ_M_S "i") (VMOVNTQ_M_U "i") + (VMOVNTQ_S "i") (VMOVNTQ_U "i") (VNEGQ_M_S "s") (VQABSQ_M_S "s") + (VQMOVNBQ_M_S "s") (VQMOVNBQ_M_U "u") + (VQMOVNBQ_S "s") (VQMOVNBQ_U "u") + (VQMOVNTQ_M_S "s") (VQMOVNTQ_M_U "u") + (VQMOVNTQ_S "s") (VQMOVNTQ_U "u") + (VQMOVUNBQ_M_S "s") + (VQMOVUNBQ_S "s") + (VQMOVUNTQ_M_S "s") + (VQMOVUNTQ_S "s") (VQNEGQ_M_S "s") (VQRSHRNBQ_M_N_S "s") (VQRSHRNBQ_M_N_U "u") (VQRSHRNBQ_N_S "s") (VQRSHRNBQ_N_U "u") @@ -1942,6 +1984,10 @@ (define_int_attr supf [(VCVTQ_TO_F_S "s") (VCVTQ_TO_F_U "u") (VREV16Q_S "s") (VCLSQ_S "s") (VQABSQ_S "s") (VQNEGQ_S "s") + (VQMOVUNBQ_M_S "s") + (VQMOVUNBQ_S "s") + (VQMOVUNTQ_M_S "s") + (VQMOVUNTQ_S "s") ]) ;; Both kinds of return insn. diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 7bf344d547a..2273078807b 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -1645,32 +1645,22 @@ (define_insn "mve_vmlsldavxq_s<mode>" ]) ;; -;; [vmovnbq_u, vmovnbq_s]) +;; [vmovnbq_u, vmovnbq_s] +;; [vmovntq_s, vmovntq_u] +;; [vqmovnbq_u, vqmovnbq_s] +;; [vqmovntq_u, vqmovntq_s] +;; [vqmovunbq_s] +;; [vqmovuntq_s] ;; -(define_insn "mve_vmovnbq_<supf><mode>" - [ - (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w") - (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0") - (match_operand:MVE_5 2 "s_register_operand" "w")] - VMOVNBQ)) - ] - "TARGET_HAVE_MVE" - "vmovnb.i%#<V_sz_elem> %q0, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vmovntq_s, vmovntq_u]) -;; -(define_insn "mve_vmovntq_<supf><mode>" +(define_insn "@mve_<mve_insn>q_<supf><mode>" [ (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w") (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0") (match_operand:MVE_5 2 "s_register_operand" "w")] - VMOVNTQ)) + MVE_MOVN)) ] "TARGET_HAVE_MVE" - "vmovnt.i%#<V_sz_elem> %q0, %q2" + "<mve_insn>.<isu>%#<V_sz_elem>\t%q0, %q2" [(set_attr "type" "mve_move") ]) @@ -1794,66 +1784,6 @@ (define_insn "mve_vqdmulltq_s<mode>" [(set_attr "type" "mve_move") ]) -;; -;; [vqmovnbq_u, vqmovnbq_s]) -;; -(define_insn "mve_vqmovnbq_<supf><mode>" - [ - (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w") - (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0") - (match_operand:MVE_5 2 "s_register_operand" "w")] - VQMOVNBQ)) - ] - "TARGET_HAVE_MVE" - "vqmovnb.<supf>%#<V_sz_elem> %q0, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vqmovntq_u, vqmovntq_s]) -;; -(define_insn "mve_vqmovntq_<supf><mode>" - [ - (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w") - (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0") - (match_operand:MVE_5 2 "s_register_operand" "w")] - VQMOVNTQ)) - ] - "TARGET_HAVE_MVE" - "vqmovnt.<supf>%#<V_sz_elem> %q0, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vqmovunbq_s]) -;; -(define_insn "mve_vqmovunbq_s<mode>" - [ - (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w") - (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0") - (match_operand:MVE_5 2 "s_register_operand" "w")] - VQMOVUNBQ_S)) - ] - "TARGET_HAVE_MVE" - "vqmovunb.s%#<V_sz_elem> %q0, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vqmovuntq_s]) -;; -(define_insn "mve_vqmovuntq_s<mode>" - [ - (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w") - (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0") - (match_operand:MVE_5 2 "s_register_operand" "w")] - VQMOVUNTQ_S)) - ] - "TARGET_HAVE_MVE" - "vqmovunt.s%#<V_sz_elem> %q0, %q2" - [(set_attr "type" "mve_move") -]) - ;; ;; [vrmlaldavhxq_s]) ;; @@ -3620,35 +3550,25 @@ (define_insn "mve_vmovltq_m_<supf><mode>" "vpst\;vmovltt.<supf>%#<V_sz_elem> %q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) -;; -;; [vmovnbq_m_u, vmovnbq_m_s]) -;; -(define_insn "mve_vmovnbq_m_<supf><mode>" - [ - (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w") - (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0") - (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")] - VMOVNBQ_M)) - ] - "TARGET_HAVE_MVE" - "vpst\;vmovnbt.i%#<V_sz_elem> %q0, %q2" - [(set_attr "type" "mve_move") - (set_attr "length""8")]) ;; -;; [vmovntq_m_u, vmovntq_m_s]) +;; [vmovnbq_m_u, vmovnbq_m_s] +;; [vmovntq_m_u, vmovntq_m_s] +;; [vqmovnbq_m_s, vqmovnbq_m_u] +;; [vqmovntq_m_u, vqmovntq_m_s] +;; [vqmovunbq_m_s] +;; [vqmovuntq_m_s] ;; -(define_insn "mve_vmovntq_m_<supf><mode>" +(define_insn "@mve_<mve_insn>q_m_<supf><mode>" [ (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w") (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0") (match_operand:MVE_5 2 "s_register_operand" "w") (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")] - VMOVNTQ_M)) + MVE_MOVN_M)) ] "TARGET_HAVE_MVE" - "vpst\;vmovntt.i%#<V_sz_elem> %q0, %q2" + "vpst\;<mve_insn>t.<isu>%#<V_sz_elem>\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -3701,70 +3621,6 @@ (define_insn "@mve_vpselq_f<mode>" [(set_attr "type" "mve_move") ]) -;; -;; [vqmovnbq_m_s, vqmovnbq_m_u]) -;; -(define_insn "mve_vqmovnbq_m_<supf><mode>" - [ - (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w") - (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0") - (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")] - VQMOVNBQ_M)) - ] - "TARGET_HAVE_MVE" - "vpst\;vqmovnbt.<supf>%#<V_sz_elem> %q0, %q2" - [(set_attr "type" "mve_move") - (set_attr "length""8")]) - -;; -;; [vqmovntq_m_u, vqmovntq_m_s]) -;; -(define_insn "mve_vqmovntq_m_<supf><mode>" - [ - (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w") - (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0") - (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")] - VQMOVNTQ_M)) - ] - "TARGET_HAVE_MVE" - "vpst\;vqmovntt.<supf>%#<V_sz_elem> %q0, %q2" - [(set_attr "type" "mve_move") - (set_attr "length""8")]) - -;; -;; [vqmovunbq_m_s]) -;; -(define_insn "mve_vqmovunbq_m_s<mode>" - [ - (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w") - (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0") - (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")] - VQMOVUNBQ_M_S)) - ] - "TARGET_HAVE_MVE" - "vpst\;vqmovunbt.s%#<V_sz_elem> %q0, %q2" - [(set_attr "type" "mve_move") - (set_attr "length""8")]) - -;; -;; [vqmovuntq_m_s]) -;; -(define_insn "mve_vqmovuntq_m_s<mode>" - [ - (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w") - (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0") - (match_operand:MVE_5 2 "s_register_operand" "w") - (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")] - VQMOVUNTQ_M_S)) - ] - "TARGET_HAVE_MVE" - "vpst\;vqmovuntt.s%#<V_sz_elem> %q0, %q2" - [(set_attr "type" "mve_move") - (set_attr "length""8")]) - ;; ;; [vrev32q_m_f]) ;; -- 2.34.1