On 2020-08-22 12:01 p.m., Roger Sayle wrote: > I suspect that the issue with the 64-bit patterns is that the second variant > of > pa.md's define_insn "shrpdi4" is unlikely ever to match as (minus:DI > (const_int 64) x) > is never "canonical" when x is itself a CONST_INT. Splitting this > define_insn > into two (or three see below) separate forms; the first as it currently is > and the > second (as you suggest) with > "TARGET_64BIT > && INTVAL (operands[3]) + INTVAL (operands[4]) == 64" > should do the trick. I will go ahead and add the basic patterns. It seems it would be best if I avoid using the "plus_xor_ior_operator". It also seems the 32-bit patterns should avoid it. > > My first impression was that the DImode shrpd instructions would be most > useful for implementing TI mode shifts, but that TI mode isn't supported by > hppa64. But then I noticed that the more immediate benefit would be in > supporting rotrdi3 and rotldi3 on TARGET_64BIT that currently don't have > expanders nor insns defined. Here GCC currently generates three > instructions > where a single shrpd would be optimal. It turns out we now need to support TI mode and __int128 for libgomp. The hppa64-hpux target won't boot without it. I had just added a change to support TI mode but it's untested.
Regards, Dave -- John David Anglin dave.ang...@bell.net
