On Thu, Aug 18, 2016 at 10:15:12AM +0100, Tamar Christina wrote: > Hi all, > > This fixes a bug in the vector load functions in which they load the > vector in the wrong order for big endian systems. This patch flips the > order conditionally in the vec_concats. > > No testcase given because plenty of existing tests for vld functions. > Ran regression tests on aarch64_be-none-elf and aarch64-none-elf. > Vldx tests now pass on aarch64_be-none-elf and no regressions on both. > > Ok for trunk? > > I do not have commit rights so if ok can someone apply it for me?
Thanks for the patch. I committed it as revision 239865, with a minor fix-up to your code formatting. > @@ -5008,7 +5146,10 @@ > rtx mem = gen_rtx_MEM (BLKmode, operands[1]); > set_mem_size (mem, <VSTRUCT:nregs> * 8); > > - emit_insn (gen_aarch64_ld<VSTRUCT:nregs><VDC:mode>_dreg (operands[0], > mem)); > + if (BYTES_BIG_ENDIAN) > + emit_insn (gen_aarch64_ld<VSTRUCT:nregs><VDC:mode>_dreg_be > (operands[0], mem)); > + else > + emit_insn (gen_aarch64_ld<VSTRUCT:nregs><VDC:mode>_dreg_le > (operands[0], mem)); > DONE; These lines exceed 80 characters and the indentation is wrong. I re-indented them to 4 spaces rather than a tab, and broke the line on the , - as so: @@ -5048,7 +5186,12 @@ rtx mem = gen_rtx_MEM (BLKmode, operands[1]); set_mem_size (mem, <VSTRUCT:nregs> * 8); - emit_insn (gen_aarch64_ld<VSTRUCT:nregs><VDC:mode>_dreg (operands[0], mem)); + if (BYTES_BIG_ENDIAN) + emit_insn (gen_aarch64_ld<VSTRUCT:nregs><VDC:mode>_dreg_be (operands[0], + mem)); + else + emit_insn (gen_aarch64_ld<VSTRUCT:nregs><VDC:mode>_dreg_le (operands[0], + mem)); DONE; Thanks, James > gcc/ > 2016-08-16 Tamar Christina <tamar.christ...@arm.com> > > * gcc/config/aarch64/aarch64-simd.md > (aarch64_ld2<mode>_dreg_le): New. > (aarch64_ld2<mode>_dreg_be): New. > (aarch64_ld2<mode>_dreg): Removed. > (aarch64_ld3<mode>_dreg_le): New. > (aarch64_ld3<mode>_dreg_be): New. > (aarch64_ld3<mode>_dreg): Removed. > (aarch64_ld4<mode>_dreg_le): New. > (aarch64_ld4<mode>_dreg_be): New. > (aarch64_ld4<mode>_dreg): Removed. > (aarch64_ld<VSTRUCT:nregs><VDC:mode>): Wrapper around _le, _be.