Uros Bizjak <ubiz...@gmail.com> writes:
> On Mon, Aug 15, 2011 at 11:57 AM, Richard Sandiford
> <rdsandif...@googlemail.com> wrote:
>
>>>> Following on from the two patches I've just posted, this one makes
>>>> config/i386/*.md use match_test for .md attributes. Tested as
>>>> described here:
>>>
>>>> http://gcc.gnu.org/ml/gcc-patches/2011-08/msg01182.html
>>>
>>>> * config/i386/i386.md: Use (match_test ...) for attribute tests.
>>>> * config/i386/mmx.md: Likewise.
>>>> * config/i386/sse.md: Likewise.
>>>
>>> - (eq (symbol_ref "TARGET_SSE2") (const_int 0)))
>>> + (not (match_test "TARGET_SSE2")))
>>>
>>> Jus a question - in predicates.md, i.e. (match_test "!TARGET_SSE2") is
>>> used. Do we want to standardize on (not (match_test "...")) form
>>> everywhere?
>>
>> Yeah, good question. I'd used (not (match_test ...)) so that genattrtab
>> could better optimise combinations of expressions. I suppose we don't
>> yet combine predicate expressions in the same way, so it probably makes
>> no difference there. We might use predicate expressions more in future
>> though.
>>
>> I'm happy to convert predicate match_tests at the same time.
>
> That would be much appreciated.
OK, here's what I committed after testing on x86_64-linux-gnu.
Richard
gcc/
* config/i386/i386.md: Use (match_test ...) for attribute tests.
* config/i386/mmx.md: Likewise.
* config/i386/sse.md: Likewise.
* config/i386/predicates.md (call_insn_operand): Use
(not (match_test "...")) instead of (match_test "!...")
* config/i386/constraints.md (w): Likewise.
Index: gcc/config/i386/i386.md
===================================================================
--- gcc/config/i386/i386.md 2011-08-27 08:17:19.000000000 +0100
+++ gcc/config/i386/i386.md 2011-08-31 19:13:34.000000000 +0100
@@ -490,18 +490,16 @@ (define_attr "prefix_0f" ""
;; Set when REX opcode prefix is used.
(define_attr "prefix_rex" ""
- (cond [(eq (symbol_ref "TARGET_64BIT") (const_int 0))
+ (cond [(not (match_test "TARGET_64BIT"))
(const_int 0)
(and (eq_attr "mode" "DI")
(and (eq_attr "type" "!push,pop,call,callv,leave,ibr")
(eq_attr "unit" "!mmx")))
(const_int 1)
(and (eq_attr "mode" "QI")
- (ne (symbol_ref "x86_extended_QIreg_mentioned_p (insn)")
- (const_int 0)))
+ (match_test "x86_extended_QIreg_mentioned_p (insn)"))
(const_int 1)
- (ne (symbol_ref "x86_extended_reg_mentioned_p (insn)")
- (const_int 0))
+ (match_test "x86_extended_reg_mentioned_p (insn)")
(const_int 1)
(and (eq_attr "type" "imovx")
(match_operand:QI 1 "ext_QIreg_operand" ""))
@@ -551,7 +549,7 @@ (define_attr "modrm" ""
(eq_attr "unit" "i387")
(const_int 0)
(and (eq_attr "type" "incdec")
- (and (eq (symbol_ref "TARGET_64BIT") (const_int 0))
+ (and (not (match_test "TARGET_64BIT"))
(ior (match_operand:SI 1 "register_operand" "")
(match_operand:HI 1 "register_operand" ""))))
(const_int 0)
@@ -597,7 +595,7 @@ (define_attr "length" ""
(attr "length_address")))
(ior (eq_attr "prefix" "vex")
(and (eq_attr "prefix" "maybe_vex")
- (ne (symbol_ref "TARGET_AVX") (const_int 0))))
+ (match_test "TARGET_AVX")))
(plus (attr "length_vex")
(plus (attr "length_immediate")
(plus (attr "modrm")
@@ -1927,16 +1925,13 @@ (define_insn "*movti_internal_rex64"
(set (attr "mode")
(cond [(eq_attr "alternative" "2,3")
(if_then_else
- (ne (symbol_ref "optimize_function_for_size_p (cfun)")
- (const_int 0))
+ (match_test "optimize_function_for_size_p (cfun)")
(const_string "V4SF")
(const_string "TI"))
(eq_attr "alternative" "4")
(if_then_else
- (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
- (const_int 0))
- (ne (symbol_ref "optimize_function_for_size_p (cfun)")
- (const_int 0)))
+ (ior (match_test "TARGET_SSE_TYPELESS_STORES")
+ (match_test "optimize_function_for_size_p (cfun)"))
(const_string "V4SF")
(const_string "TI"))]
(const_string "DI")))])
@@ -1985,13 +1980,11 @@ (define_insn "*movti_internal_sse"
[(set_attr "type" "sselog1,ssemov,ssemov")
(set_attr "prefix" "maybe_vex")
(set (attr "mode")
- (cond [(ior (eq (symbol_ref "TARGET_SSE2") (const_int 0))
- (ne (symbol_ref "optimize_function_for_size_p (cfun)")
- (const_int 0)))
+ (cond [(ior (not (match_test "TARGET_SSE2"))
+ (match_test "optimize_function_for_size_p (cfun)"))
(const_string "V4SF")
(and (eq_attr "alternative" "2")
- (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
- (const_int 0)))
+ (match_test "TARGET_SSE_TYPELESS_STORES"))
(const_string "V4SF")]
(const_string "TI")))])
@@ -2308,11 +2301,11 @@ (define_insn "*movsi_internal"
(const_string "DI")
(eq_attr "alternative" "6,7")
(if_then_else
- (eq (symbol_ref "TARGET_SSE2") (const_int 0))
+ (not (match_test "TARGET_SSE2"))
(const_string "V4SF")
(const_string "TI"))
(and (eq_attr "alternative" "8,9,10,11")
- (eq (symbol_ref "TARGET_SSE2") (const_int 0)))
+ (not (match_test "TARGET_SSE2")))
(const_string "SF")
]
(const_string "SI")))])
@@ -2336,20 +2329,16 @@ (define_insn "*movhi_internal"
}
}
[(set (attr "type")
- (cond [(ne (symbol_ref "optimize_function_for_size_p (cfun)")
- (const_int 0))
+ (cond [(match_test "optimize_function_for_size_p (cfun)")
(const_string "imov")
(and (eq_attr "alternative" "0")
- (ior (eq (symbol_ref "TARGET_PARTIAL_REG_STALL")
- (const_int 0))
- (eq (symbol_ref "TARGET_HIMODE_MATH")
- (const_int 0))))
+ (ior (not (match_test "TARGET_PARTIAL_REG_STALL"))
+ (not (match_test "TARGET_HIMODE_MATH"))))
(const_string "imov")
(and (eq_attr "alternative" "1,2")
(match_operand:HI 1 "aligned_operand" ""))
(const_string "imov")
- (and (ne (symbol_ref "TARGET_MOVX")
- (const_int 0))
+ (and (match_test "TARGET_MOVX")
(eq_attr "alternative" "0,2"))
(const_string "imovx")
]
@@ -2361,10 +2350,8 @@ (define_insn "*movhi_internal"
(match_operand:HI 1 "aligned_operand" ""))
(const_string "SI")
(and (eq_attr "alternative" "0")
- (ior (eq (symbol_ref "TARGET_PARTIAL_REG_STALL")
- (const_int 0))
- (eq (symbol_ref "TARGET_HIMODE_MATH")
- (const_int 0))))
+ (ior (not (match_test "TARGET_PARTIAL_REG_STALL"))
+ (not (match_test "TARGET_HIMODE_MATH"))))
(const_string "SI")
]
(const_string "HI")))])
@@ -2400,19 +2387,15 @@ (define_insn "*movqi_internal"
(cond [(and (eq_attr "alternative" "5")
(not (match_operand:QI 1 "aligned_operand" "")))
(const_string "imovx")
- (ne (symbol_ref "optimize_function_for_size_p (cfun)")
- (const_int 0))
+ (match_test "optimize_function_for_size_p (cfun)")
(const_string "imov")
(and (eq_attr "alternative" "3")
- (ior (eq (symbol_ref "TARGET_PARTIAL_REG_STALL")
- (const_int 0))
- (eq (symbol_ref "TARGET_QIMODE_MATH")
- (const_int 0))))
+ (ior (not (match_test "TARGET_PARTIAL_REG_STALL"))
+ (not (match_test "TARGET_QIMODE_MATH"))))
(const_string "imov")
(eq_attr "alternative" "3,5")
(const_string "imovx")
- (and (ne (symbol_ref "TARGET_MOVX")
- (const_int 0))
+ (and (match_test "TARGET_MOVX")
(eq_attr "alternative" "2"))
(const_string "imovx")
]
@@ -2426,20 +2409,15 @@ (define_insn "*movqi_internal"
(const_string "SI")
(and (eq_attr "type" "imov")
(and (eq_attr "alternative" "0,1")
- (and (ne (symbol_ref "TARGET_PARTIAL_REG_DEPENDENCY")
- (const_int 0))
- (and (eq (symbol_ref "optimize_function_for_size_p
(cfun)")
- (const_int 0))
- (eq (symbol_ref "TARGET_PARTIAL_REG_STALL")
- (const_int 0))))))
+ (and (match_test "TARGET_PARTIAL_REG_DEPENDENCY")
+ (and (not (match_test "optimize_function_for_size_p
(cfun)"))
+ (not (match_test
"TARGET_PARTIAL_REG_STALL"))))))
(const_string "SI")
;; Avoid partial register stalls when not using QImode arithmetic
(and (eq_attr "type" "imov")
(and (eq_attr "alternative" "0,1")
- (and (ne (symbol_ref "TARGET_PARTIAL_REG_STALL")
- (const_int 0))
- (eq (symbol_ref "TARGET_QIMODE_MATH")
- (const_int 0)))))
+ (and (match_test "TARGET_PARTIAL_REG_STALL")
+ (not (match_test "TARGET_QIMODE_MATH")))))
(const_string "SI")
]
(const_string "QI")))])
@@ -2579,8 +2557,7 @@ (define_insn "*movqi_extv_1_rex64"
}
[(set (attr "type")
(if_then_else (ior (not (match_operand:QI 0 "QIreg_operand" ""))
- (ne (symbol_ref "TARGET_MOVX")
- (const_int 0)))
+ (match_test "TARGET_MOVX"))
(const_string "imovx")
(const_string "imov")))
(set (attr "mode")
@@ -2606,8 +2583,7 @@ (define_insn "*movqi_extv_1"
[(set (attr "type")
(if_then_else (and (match_operand:QI 0 "register_operand" "")
(ior (not (match_operand:QI 0 "QIreg_operand" ""))
- (ne (symbol_ref "TARGET_MOVX")
- (const_int 0))))
+ (match_test "TARGET_MOVX")))
(const_string "imovx")
(const_string "imov")))
(set (attr "mode")
@@ -2643,8 +2619,7 @@ (define_insn "*movqi_extzv_2_rex64"
}
[(set (attr "type")
(if_then_else (ior (not (match_operand:QI 0 "QIreg_operand" ""))
- (ne (symbol_ref "TARGET_MOVX")
- (const_int 0)))
+ (match_test "TARGET_MOVX"))
(const_string "imovx")
(const_string "imov")))
(set (attr "mode")
@@ -2671,8 +2646,7 @@ (define_insn "*movqi_extzv_2"
[(set (attr "type")
(if_then_else (and (match_operand:QI 0 "register_operand" "")
(ior (not (match_operand:QI 0 "QIreg_operand" ""))
- (ne (symbol_ref "TARGET_MOVX")
- (const_int 0))))
+ (match_test "TARGET_MOVX")))
(const_string "imovx")
(const_string "imov")))
(set (attr "mode")
@@ -2937,16 +2911,13 @@ (define_insn "*movtf_internal"
(set (attr "mode")
(cond [(eq_attr "alternative" "0,2")
(if_then_else
- (ne (symbol_ref "optimize_function_for_size_p (cfun)")
- (const_int 0))
+ (match_test "optimize_function_for_size_p (cfun)")
(const_string "V4SF")
(const_string "TI"))
(eq_attr "alternative" "1")
(if_then_else
- (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
- (const_int 0))
- (ne (symbol_ref "optimize_function_for_size_p (cfun)")
- (const_int 0)))
+ (ior (match_test "TARGET_SSE_TYPELESS_STORES")
+ (match_test "optimize_function_for_size_p (cfun)"))
(const_string "V4SF")
(const_string "TI"))]
(const_string "DI")))])
@@ -3084,11 +3055,9 @@ (define_insn "*movdf_internal_rex64"
/* xorps is one byte shorter. */
(eq_attr "alternative" "7")
- (cond [(ne (symbol_ref "optimize_function_for_size_p (cfun)")
- (const_int 0))
+ (cond [(match_test "optimize_function_for_size_p (cfun)")
(const_string "V4SF")
- (ne (symbol_ref "TARGET_SSE_LOAD0_BY_PXOR")
- (const_int 0))
+ (match_test "TARGET_SSE_LOAD0_BY_PXOR")
(const_string "TI")
]
(const_string "V2DF"))
@@ -3100,11 +3069,9 @@ (define_insn "*movdf_internal_rex64"
movaps encodes one byte shorter. */
(eq_attr "alternative" "8")
(cond
- [(ne (symbol_ref "optimize_function_for_size_p (cfun)")
- (const_int 0))
+ [(match_test "optimize_function_for_size_p (cfun)")
(const_string "V4SF")
- (ne (symbol_ref "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
- (const_int 0))
+ (match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
(const_string "V2DF")
]
(const_string "DF"))
@@ -3113,8 +3080,7 @@ (define_insn "*movdf_internal_rex64"
of register. */
(eq_attr "alternative" "9")
(if_then_else
- (ne (symbol_ref "TARGET_SSE_SPLIT_REGS")
- (const_int 0))
+ (match_test "TARGET_SSE_SPLIT_REGS")
(const_string "V1DF")
(const_string "DF"))
]
@@ -3208,7 +3174,7 @@ (define_insn "*movdf_internal"
(const_string "SI")
/* For SSE1, we have many fewer alternatives. */
- (eq (symbol_ref "TARGET_SSE2") (const_int 0))
+ (not (match_test "TARGET_SSE2"))
(if_then_else
(eq_attr "alternative" "5,6,9,10")
(const_string "V4SF")
@@ -3216,11 +3182,9 @@ (define_insn "*movdf_internal"
/* xorps is one byte shorter. */
(eq_attr "alternative" "5,9")
- (cond [(ne (symbol_ref "optimize_function_for_size_p (cfun)")
- (const_int 0))
+ (cond [(match_test "optimize_function_for_size_p (cfun)")
(const_string "V4SF")
- (ne (symbol_ref "TARGET_SSE_LOAD0_BY_PXOR")
- (const_int 0))
+ (match_test "TARGET_SSE_LOAD0_BY_PXOR")
(const_string "TI")
]
(const_string "V2DF"))
@@ -3232,11 +3196,9 @@ (define_insn "*movdf_internal"
movaps encodes one byte shorter. */
(eq_attr "alternative" "6,10")
(cond
- [(ne (symbol_ref "optimize_function_for_size_p (cfun)")
- (const_int 0))
+ [(match_test "optimize_function_for_size_p (cfun)")
(const_string "V4SF")
- (ne (symbol_ref "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
- (const_int 0))
+ (match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
(const_string "V2DF")
]
(const_string "DF"))
@@ -3245,8 +3207,7 @@ (define_insn "*movdf_internal"
of register. */
(eq_attr "alternative" "7,11")
(if_then_else
- (ne (symbol_ref "TARGET_SSE_SPLIT_REGS")
- (const_int 0))
+ (match_test "TARGET_SSE_SPLIT_REGS")
(const_string "V1DF")
(const_string "DF"))
]
@@ -3321,12 +3282,9 @@ (define_insn "*movsf_internal"
(const_string "SI")
(eq_attr "alternative" "5")
(if_then_else
- (and (and (ne (symbol_ref "TARGET_SSE_LOAD0_BY_PXOR")
- (const_int 0))
- (ne (symbol_ref "TARGET_SSE2")
- (const_int 0)))
- (eq (symbol_ref "optimize_function_for_size_p (cfun)")
- (const_int 0)))
+ (and (and (match_test "TARGET_SSE_LOAD0_BY_PXOR")
+ (match_test "TARGET_SSE2"))
+ (not (match_test "optimize_function_for_size_p
(cfun)")))
(const_string "TI")
(const_string "V4SF"))
/* For architectures resolving dependencies on
@@ -3341,10 +3299,8 @@ (define_insn "*movsf_internal"
to avoid problems on using packed logical operations. */
(eq_attr "alternative" "6")
(if_then_else
- (ior (ne (symbol_ref "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
- (const_int 0))
- (ne (symbol_ref "TARGET_SSE_SPLIT_REGS")
- (const_int 0)))
+ (ior (match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
+ (match_test "TARGET_SSE_SPLIT_REGS"))
(const_string "V4SF")
(const_string "SF"))
(eq_attr "alternative" "11")
@@ -4962,7 +4918,7 @@ (define_insn "*float<SWI48x:mode><MODEF:
(set (attr "prefix_rex")
(if_then_else
(and (eq_attr "prefix" "maybe_vex")
- (ne (symbol_ref "<SWI48x:MODE>mode == DImode") (const_int 0)))
+ (match_test "<SWI48x:MODE>mode == DImode"))
(const_string "1")
(const_string "*")))
(set_attr "unit" "i387,*,*")
@@ -4987,7 +4943,7 @@ (define_insn "*float<SWI48x:mode><MODEF:
(set (attr "prefix_rex")
(if_then_else
(and (eq_attr "prefix" "maybe_vex")
- (ne (symbol_ref "<SWI48x:MODE>mode == DImode") (const_int 0)))
+ (match_test "<SWI48x:MODE>mode == DImode"))
(const_string "1")
(const_string "*")))
(set_attr "athlon_decode" "*,direct")
@@ -5182,7 +5138,7 @@ (define_insn "*float<SWI48x:mode><MODEF:
(set (attr "prefix_rex")
(if_then_else
(and (eq_attr "prefix" "maybe_vex")
- (ne (symbol_ref "<SWI48x:MODE>mode == DImode") (const_int 0)))
+ (match_test "<SWI48x:MODE>mode == DImode"))
(const_string "1")
(const_string "*")))
(set_attr "athlon_decode" "double,direct")
@@ -5217,7 +5173,7 @@ (define_insn "*float<SWI48x:mode><MODEF:
(set (attr "prefix_rex")
(if_then_else
(and (eq_attr "prefix" "maybe_vex")
- (ne (symbol_ref "<SWI48x:MODE>mode == DImode") (const_int 0)))
+ (match_test "<SWI48x:MODE>mode == DImode"))
(const_string "1")
(const_string "*")))
(set_attr "athlon_decode" "direct")
@@ -7751,7 +7707,7 @@ (define_insn "*anddi_1"
(set (attr "prefix_rex")
(if_then_else
(and (eq_attr "type" "imovx")
- (and (ne (symbol_ref "INTVAL (operands[2]) == 0xff") (const_int 0))
+ (and (match_test "INTVAL (operands[2]) == 0xff")
(match_operand 1 "ext_QIreg_operand" "")))
(const_string "1")
(const_string "*")))
@@ -7795,7 +7751,7 @@ (define_insn "*andsi_1"
(set (attr "prefix_rex")
(if_then_else
(and (eq_attr "type" "imovx")
- (and (ne (symbol_ref "INTVAL (operands[2]) == 0xff") (const_int 0))
+ (and (match_test "INTVAL (operands[2]) == 0xff")
(match_operand 1 "ext_QIreg_operand" "")))
(const_string "1")
(const_string "*")))
@@ -9130,8 +9086,7 @@ (define_insn "*ashl<mode>3_1"
(const_string "lea")
(eq_attr "alternative" "2")
(const_string "ishiftx")
- (and (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD")
- (const_int 0))
+ (and (and (match_test "TARGET_DOUBLE_WITH_ADD")
(match_operand 0 "register_operand" ""))
(match_operand 2 "const1_operand" ""))
(const_string "alu")
@@ -9142,8 +9097,8 @@ (define_insn "*ashl<mode>3_1"
(ior (eq_attr "type" "alu")
(and (eq_attr "type" "ishift")
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 ||
optimize_function_for_size_p (cfun)")
- (const_int 0)))))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p
(cfun)")))))
(const_string "0")
(const_string "*")))
(set_attr "mode" "<MODE>")])
@@ -9201,8 +9156,7 @@ (define_insn "*ashlsi3_1_zext"
(const_string "lea")
(eq_attr "alternative" "2")
(const_string "ishiftx")
- (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD")
- (const_int 0))
+ (and (match_test "TARGET_DOUBLE_WITH_ADD")
(match_operand 2 "const1_operand" ""))
(const_string "alu")
]
@@ -9212,8 +9166,8 @@ (define_insn "*ashlsi3_1_zext"
(ior (eq_attr "type" "alu")
(and (eq_attr "type" "ishift")
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 ||
optimize_function_for_size_p (cfun)")
- (const_int 0)))))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p
(cfun)")))))
(const_string "0")
(const_string "*")))
(set_attr "mode" "SI")])
@@ -9257,8 +9211,7 @@ (define_insn "*ashlhi3_1"
[(set (attr "type")
(cond [(eq_attr "alternative" "1")
(const_string "lea")
- (and (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD")
- (const_int 0))
+ (and (and (match_test "TARGET_DOUBLE_WITH_ADD")
(match_operand 0 "register_operand" ""))
(match_operand 2 "const1_operand" ""))
(const_string "alu")
@@ -9269,8 +9222,8 @@ (define_insn "*ashlhi3_1"
(ior (eq_attr "type" "alu")
(and (eq_attr "type" "ishift")
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 ||
optimize_function_for_size_p (cfun)")
- (const_int 0)))))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p
(cfun)")))))
(const_string "0")
(const_string "*")))
(set_attr "mode" "HI,SI")])
@@ -9316,8 +9269,7 @@ (define_insn "*ashlqi3_1"
[(set (attr "type")
(cond [(eq_attr "alternative" "2")
(const_string "lea")
- (and (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD")
- (const_int 0))
+ (and (and (match_test "TARGET_DOUBLE_WITH_ADD")
(match_operand 0 "register_operand" ""))
(match_operand 2 "const1_operand" ""))
(const_string "alu")
@@ -9328,8 +9280,8 @@ (define_insn "*ashlqi3_1"
(ior (eq_attr "type" "alu")
(and (eq_attr "type" "ishift")
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 ||
optimize_function_for_size_p (cfun)")
- (const_int 0)))))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p
(cfun)")))))
(const_string "0")
(const_string "*")))
(set_attr "mode" "QI,SI,SI")])
@@ -9360,8 +9312,7 @@ (define_insn "*ashlqi3_1_slp"
}
}
[(set (attr "type")
- (cond [(and (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD")
- (const_int 0))
+ (cond [(and (and (match_test "TARGET_DOUBLE_WITH_ADD")
(match_operand 0 "register_operand" ""))
(match_operand 1 "const1_operand" ""))
(const_string "alu")
@@ -9372,8 +9323,8 @@ (define_insn "*ashlqi3_1_slp"
(ior (eq_attr "type" "alu")
(and (eq_attr "type" "ishift1")
(and (match_operand 1 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 ||
optimize_function_for_size_p (cfun)")
- (const_int 0)))))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p
(cfun)")))))
(const_string "0")
(const_string "*")))
(set_attr "mode" "QI")])
@@ -9457,8 +9408,7 @@ (define_insn "*ashl<mode>3_cmp"
}
}
[(set (attr "type")
- (cond [(and (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD")
- (const_int 0))
+ (cond [(and (and (match_test "TARGET_DOUBLE_WITH_ADD")
(match_operand 0 "register_operand" ""))
(match_operand 2 "const1_operand" ""))
(const_string "alu")
@@ -9469,8 +9419,8 @@ (define_insn "*ashl<mode>3_cmp"
(ior (eq_attr "type" "alu")
(and (eq_attr "type" "ishift")
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 ||
optimize_function_for_size_p (cfun)")
- (const_int 0)))))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p
(cfun)")))))
(const_string "0")
(const_string "*")))
(set_attr "mode" "<MODE>")])
@@ -9507,8 +9457,7 @@ (define_insn "*ashlsi3_cmp_zext"
}
}
[(set (attr "type")
- (cond [(and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD")
- (const_int 0))
+ (cond [(and (match_test "TARGET_DOUBLE_WITH_ADD")
(match_operand 2 "const1_operand" ""))
(const_string "alu")
]
@@ -9518,8 +9467,8 @@ (define_insn "*ashlsi3_cmp_zext"
(ior (eq_attr "type" "alu")
(and (eq_attr "type" "ishift")
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 ||
optimize_function_for_size_p (cfun)")
- (const_int 0)))))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p
(cfun)")))))
(const_string "0")
(const_string "*")))
(set_attr "mode" "SI")])
@@ -9553,8 +9502,7 @@ (define_insn "*ashl<mode>3_cconly"
}
}
[(set (attr "type")
- (cond [(and (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD")
- (const_int 0))
+ (cond [(and (and (match_test "TARGET_DOUBLE_WITH_ADD")
(match_operand 0 "register_operand" ""))
(match_operand 2 "const1_operand" ""))
(const_string "alu")
@@ -9565,8 +9513,8 @@ (define_insn "*ashl<mode>3_cconly"
(ior (eq_attr "type" "alu")
(and (eq_attr "type" "ishift")
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 ||
optimize_function_for_size_p (cfun)")
- (const_int 0)))))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p
(cfun)")))))
(const_string "0")
(const_string "*")))
(set_attr "mode" "<MODE>")])
@@ -9784,8 +9732,8 @@ (define_insn "*<shiftrt_insn><mode>3_1"
(set (attr "length_immediate")
(if_then_else
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 || optimize_function_for_size_p
(cfun)")
- (const_int 0)))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p (cfun)")))
(const_string "0")
(const_string "*")))
(set_attr "mode" "<MODE>")])
@@ -9837,8 +9785,8 @@ (define_insn "*<shiftrt_insn>si3_1_zext"
(set (attr "length_immediate")
(if_then_else
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 || optimize_function_for_size_p
(cfun)")
- (const_int 0)))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p (cfun)")))
(const_string "0")
(const_string "*")))
(set_attr "mode" "SI")])
@@ -9873,8 +9821,8 @@ (define_insn "*<shiftrt_insn><mode>3_1"
(set (attr "length_immediate")
(if_then_else
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 || optimize_function_for_size_p
(cfun)")
- (const_int 0)))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p (cfun)")))
(const_string "0")
(const_string "*")))
(set_attr "mode" "<MODE>")])
@@ -9899,8 +9847,8 @@ (define_insn "*<shiftrt_insn>qi3_1_slp"
(set (attr "length_immediate")
(if_then_else
(and (match_operand 1 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 || optimize_function_for_size_p
(cfun)")
- (const_int 0)))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p (cfun)")))
(const_string "0")
(const_string "*")))
(set_attr "mode" "QI")])
@@ -9934,8 +9882,8 @@ (define_insn "*<shiftrt_insn><mode>3_cmp
(set (attr "length_immediate")
(if_then_else
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 || optimize_function_for_size_p
(cfun)")
- (const_int 0)))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p (cfun)")))
(const_string "0")
(const_string "*")))
(set_attr "mode" "<MODE>")])
@@ -9966,8 +9914,8 @@ (define_insn "*<shiftrt_insn>si3_cmp_zex
(set (attr "length_immediate")
(if_then_else
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 || optimize_function_for_size_p
(cfun)")
- (const_int 0)))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p (cfun)")))
(const_string "0")
(const_string "*")))
(set_attr "mode" "SI")])
@@ -9996,8 +9944,8 @@ (define_insn "*<shiftrt_insn><mode>3_cco
(set (attr "length_immediate")
(if_then_else
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 || optimize_function_for_size_p
(cfun)")
- (const_int 0)))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p (cfun)")))
(const_string "0")
(const_string "*")))
(set_attr "mode" "<MODE>")])
@@ -10165,8 +10113,8 @@ (define_insn "*<rotate_insn><mode>3_1"
(if_then_else
(and (eq_attr "type" "rotate")
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 || optimize_function_for_size_p
(cfun)")
- (const_int 0))))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p (cfun)"))))
(const_string "0")
(const_string "*")))
(set_attr "mode" "<MODE>")])
@@ -10231,8 +10179,8 @@ (define_insn "*<rotate_insn>si3_1_zext"
(if_then_else
(and (eq_attr "type" "rotate")
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 || optimize_function_for_size_p
(cfun)")
- (const_int 0))))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p (cfun)"))))
(const_string "0")
(const_string "*")))
(set_attr "mode" "SI")])
@@ -10279,8 +10227,8 @@ (define_insn "*<rotate_insn><mode>3_1"
(set (attr "length_immediate")
(if_then_else
(and (match_operand 2 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 || optimize_function_for_size_p
(cfun)")
- (const_int 0)))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p (cfun)")))
(const_string "0")
(const_string "*")))
(set_attr "mode" "<MODE>")])
@@ -10305,8 +10253,8 @@ (define_insn "*<rotate_insn>qi3_1_slp"
(set (attr "length_immediate")
(if_then_else
(and (match_operand 1 "const1_operand" "")
- (ne (symbol_ref "TARGET_SHIFT1 || optimize_function_for_size_p
(cfun)")
- (const_int 0)))
+ (ior (match_test "TARGET_SHIFT1")
+ (match_test "optimize_function_for_size_p (cfun)")))
(const_string "0")
(const_string "*")))
(set_attr "mode" "QI")])
@@ -15781,7 +15729,7 @@ (define_insn "*strmovqi_1"
(set_attr "memory" "both")
(set (attr "prefix_rex")
(if_then_else
- (ne (symbol_ref "<P:MODE>mode == DImode") (const_int 0))
+ (match_test "<P:MODE>mode == DImode")
(const_string "0")
(const_string "*")))
(set_attr "mode" "QI")])
@@ -15957,7 +15905,7 @@ (define_insn "*strsetqi_1"
(set_attr "memory" "store")
(set (attr "prefix_rex")
(if_then_else
- (ne (symbol_ref "<P:MODE>mode == DImode") (const_int 0))
+ (match_test "<P:MODE>mode == DImode")
(const_string "0")
(const_string "*")))
(set_attr "mode" "QI")])
@@ -16023,7 +15971,7 @@ (define_insn "*rep_stosqi"
(set_attr "memory" "store")
(set (attr "prefix_rex")
(if_then_else
- (ne (symbol_ref "<P:MODE>mode == DImode") (const_int 0))
+ (match_test "<P:MODE>mode == DImode")
(const_string "0")
(const_string "*")))
(set_attr "mode" "QI")])
@@ -16143,7 +16091,7 @@ (define_insn "*cmpstrnqi_nz_1"
(set_attr "mode" "QI")
(set (attr "prefix_rex")
(if_then_else
- (ne (symbol_ref "<P:MODE>mode == DImode") (const_int 0))
+ (match_test "<P:MODE>mode == DImode")
(const_string "0")
(const_string "*")))
(set_attr "prefix_rep" "1")])
@@ -16183,7 +16131,7 @@ (define_insn "*cmpstrnqi_1"
(set_attr "mode" "QI")
(set (attr "prefix_rex")
(if_then_else
- (ne (symbol_ref "<P:MODE>mode == DImode") (const_int 0))
+ (match_test "<P:MODE>mode == DImode")
(const_string "0")
(const_string "*")))
(set_attr "prefix_rep" "1")])
@@ -16224,7 +16172,7 @@ (define_insn "*strlenqi_1"
(set_attr "mode" "QI")
(set (attr "prefix_rex")
(if_then_else
- (ne (symbol_ref "<P:MODE>mode == DImode") (const_int 0))
+ (match_test "<P:MODE>mode == DImode")
(const_string "0")
(const_string "*")))
(set_attr "prefix_rep" "1")])
@@ -16651,7 +16599,7 @@ (define_insn "pro_epilogue_adjust_stack_
}
[(set (attr "type")
(cond [(and (eq_attr "alternative" "0")
- (eq (symbol_ref "TARGET_OPT_AGU") (const_int 0)))
+ (not (match_test "TARGET_OPT_AGU")))
(const_string "alu")
(match_operand:<MODE> 2 "const0_operand" "")
(const_string "imov")
Index: gcc/config/i386/mmx.md
===================================================================
--- gcc/config/i386/mmx.md 2011-08-25 19:30:12.000000000 +0100
+++ gcc/config/i386/mmx.md 2011-08-31 19:05:49.000000000 +0100
@@ -159,13 +159,13 @@ (define_insn "*mov<mode>_internal"
(if_then_else
(ior (eq_attr "alternative" "4,5")
(and (eq_attr "alternative" "7")
- (eq (symbol_ref "TARGET_AVX") (const_int 0))))
+ (not (match_test "TARGET_AVX"))))
(const_string "1")
(const_string "*")))
(set (attr "prefix_data16")
(if_then_else
(and (eq_attr "alternative" "8")
- (eq (symbol_ref "TARGET_AVX") (const_int 0)))
+ (not (match_test "TARGET_AVX")))
(const_string "1")
(const_string "*")))
(set (attr "prefix")
@@ -224,7 +224,7 @@ (define_insn "*movv2sf_internal_rex64"
(set (attr "length_vex")
(if_then_else
(and (eq_attr "alternative" "12,13")
- (ne (symbol_ref "TARGET_AVX") (const_int 0)))
+ (match_test "TARGET_AVX"))
(const_string "4")
(const_string "*")))
(set (attr "prefix")
@@ -1563,7 +1563,8 @@ (define_insn "*mmx_uavgv8qi3"
[(set_attr "type" "mmxshft")
(set (attr "prefix_extra")
(if_then_else
- (eq (symbol_ref "(TARGET_SSE || TARGET_3DNOW_A)") (const_int 0))
+ (not (ior (match_test "TARGET_SSE")
+ (match_test "TARGET_3DNOW_A")))
(const_string "1")
(const_string "*")))
(set_attr "mode" "DI")])
Index: gcc/config/i386/sse.md
===================================================================
--- gcc/config/i386/sse.md 2011-08-31 19:04:49.000000000 +0100
+++ gcc/config/i386/sse.md 2011-08-31 19:12:09.000000000 +0100
@@ -397,15 +397,12 @@ (define_insn "*mov<mode>_internal"
[(set_attr "type" "sselog1,ssemov,ssemov")
(set_attr "prefix" "maybe_vex")
(set (attr "mode")
- (cond [(ne (symbol_ref "TARGET_AVX") (const_int 0))
+ (cond [(match_test "TARGET_AVX")
(const_string "<sseinsnmode>")
- (ior (ior
- (ne (symbol_ref "optimize_function_for_size_p (cfun)")
- (const_int 0))
- (eq (symbol_ref "TARGET_SSE2") (const_int 0)))
+ (ior (ior (match_test "optimize_function_for_size_p (cfun)")
+ (not (match_test "TARGET_SSE2")))
(and (eq_attr "alternative" "2")
- (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES")
- (const_int 0))))
+ (match_test "TARGET_SSE_TYPELESS_STORES")))
(const_string "V4SF")
(eq (const_string "<MODE>mode") (const_string "V4SFmode"))
(const_string "V4SF")
@@ -548,7 +545,7 @@ (define_insn "*<sse2>_movdqu<avxsizesuff
(set_attr "movu" "1")
(set (attr "prefix_data16")
(if_then_else
- (ne (symbol_ref "TARGET_AVX") (const_int 0))
+ (match_test "TARGET_AVX")
(const_string "*")
(const_string "1")))
(set_attr "prefix" "maybe_vex")
@@ -564,12 +561,12 @@ (define_insn "<sse3>_lddqu<avxsizesuffix
(set_attr "movu" "1")
(set (attr "prefix_data16")
(if_then_else
- (ne (symbol_ref "TARGET_AVX") (const_int 0))
+ (match_test "TARGET_AVX")
(const_string "*")
(const_string "0")))
(set (attr "prefix_rep")
(if_then_else
- (ne (symbol_ref "TARGET_AVX") (const_int 0))
+ (match_test "TARGET_AVX")
(const_string "*")
(const_string "1")))
(set_attr "prefix" "maybe_vex")
@@ -604,7 +601,7 @@ (define_insn "<sse2>_movnt<mode>"
[(set_attr "type" "ssecvt")
(set (attr "prefix_data16")
(if_then_else
- (ne (symbol_ref "TARGET_AVX") (const_int 0))
+ (match_test "TARGET_AVX")
(const_string "*")
(const_string "1")))
(set_attr "prefix" "maybe_vex")
@@ -2247,7 +2244,7 @@ (define_insn "sse2_cvtps2dq"
[(set_attr "type" "ssecvt")
(set (attr "prefix_data16")
(if_then_else
- (ne (symbol_ref "TARGET_AVX") (const_int 0))
+ (match_test "TARGET_AVX")
(const_string "*")
(const_string "1")))
(set_attr "prefix" "maybe_vex")
@@ -2270,12 +2267,12 @@ (define_insn "sse2_cvttps2dq"
[(set_attr "type" "ssecvt")
(set (attr "prefix_rep")
(if_then_else
- (ne (symbol_ref "TARGET_AVX") (const_int 0))
+ (match_test "TARGET_AVX")
(const_string "*")
(const_string "1")))
(set (attr "prefix_data16")
(if_then_else
- (ne (symbol_ref "TARGET_AVX") (const_int 0))
+ (match_test "TARGET_AVX")
(const_string "*")
(const_string "0")))
(set_attr "prefix_data16" "0")
@@ -4411,7 +4408,7 @@ (define_insn "sse2_storehpd"
(set (attr "prefix_data16")
(if_then_else
(and (eq_attr "alternative" "0")
- (eq (symbol_ref "TARGET_AVX") (const_int 0)))
+ (not (match_test "TARGET_AVX")))
(const_string "1")
(const_string "*")))
(set_attr "prefix" "maybe_vex,orig,vex,*,*,*")
@@ -4641,7 +4638,7 @@ (define_insn "sse2_movsd"
(set (attr "prefix_data16")
(if_then_else
(and (eq_attr "alternative" "2,4")
- (eq (symbol_ref "TARGET_AVX") (const_int 0)))
+ (not (match_test "TARGET_AVX")))
(const_string "1")
(const_string "*")))
(set_attr "length_immediate" "*,*,*,*,*,1,*,*,*")
@@ -6320,11 +6317,11 @@ (define_insn "*andnot<mode>3"
(const_string "*")))
(set_attr "prefix" "orig,vex")
(set (attr "mode")
- (cond [(ne (symbol_ref "TARGET_AVX2") (const_int 0))
+ (cond [(match_test "TARGET_AVX2")
(const_string "OI")
- (ne (symbol_ref "GET_MODE_SIZE (<MODE>mode) > 128") (const_int 0))
+ (match_test "GET_MODE_SIZE (<MODE>mode) > 128")
(const_string "V8SF")
- (ne (symbol_ref "TARGET_SSE2") (const_int 0))
+ (match_test "TARGET_SSE2")
(const_string "TI")
]
(const_string "V4SF")))])
@@ -6396,11 +6393,11 @@ (define_insn "*<code><mode>3"
(const_string "*")))
(set_attr "prefix" "orig,vex")
(set (attr "mode")
- (cond [(ne (symbol_ref "TARGET_AVX2") (const_int 0))
+ (cond [(match_test "TARGET_AVX2")
(const_string "OI")
- (ne (symbol_ref "GET_MODE_SIZE (<MODE>mode) > 128") (const_int 0))
+ (match_test "GET_MODE_SIZE (<MODE>mode) > 128")
(const_string "V8SF")
- (ne (symbol_ref "TARGET_SSE2") (const_int 0))
+ (match_test "TARGET_SSE2")
(const_string "TI")
]
(const_string "V4SF")))])
@@ -6813,19 +6810,19 @@ (define_insn "<sse2p4_1>_pinsr<ssemodesu
(set_attr "type" "sselog")
(set (attr "prefix_rex")
(if_then_else
- (and (eq (symbol_ref "TARGET_AVX") (const_int 0))
+ (and (not (match_test "TARGET_AVX"))
(eq (const_string "<MODE>mode") (const_string "V2DImode")))
(const_string "1")
(const_string "*")))
(set (attr "prefix_data16")
(if_then_else
- (and (eq (symbol_ref "TARGET_AVX") (const_int 0))
+ (and (not (match_test "TARGET_AVX"))
(eq (const_string "<MODE>mode") (const_string "V8HImode")))
(const_string "1")
(const_string "*")))
(set (attr "prefix_extra")
(if_then_else
- (and (eq (symbol_ref "TARGET_AVX") (const_int 0))
+ (and (not (match_test "TARGET_AVX"))
(eq (const_string "<MODE>mode") (const_string "V8HImode")))
(const_string "*")
(const_string "1")))
@@ -7495,7 +7492,7 @@ (define_insn "*vec_concatv2di_rex64"
(set (attr "prefix_rex")
(if_then_else
(and (eq_attr "alternative" "0,3")
- (eq (symbol_ref "TARGET_AVX") (const_int 0)))
+ (not (match_test "TARGET_AVX")))
(const_string "1")
(const_string "*")))
(set_attr "prefix_extra" "1,1,*,*,*,*,*,*,*")
@@ -9709,7 +9706,7 @@ (define_insn "<sse4_1>_round<ssemodesuff
[(set_attr "type" "ssecvt")
(set (attr "prefix_data16")
(if_then_else
- (ne (symbol_ref "TARGET_AVX") (const_int 0))
+ (match_test "TARGET_AVX")
(const_string "*")
(const_string "1")))
(set_attr "prefix_extra" "1")
Index: gcc/config/i386/predicates.md
===================================================================
--- gcc/config/i386/predicates.md 2011-08-31 20:51:57.000000000 +0100
+++ gcc/config/i386/predicates.md 2011-08-31 20:52:02.000000000 +0100
@@ -565,7 +565,7 @@ (define_predicate "indirect_branch_opera
(define_predicate "call_insn_operand"
(ior (match_operand 0 "constant_call_address_operand")
(match_operand 0 "call_register_no_elim_operand")
- (and (match_test "!TARGET_X32")
+ (and (not (match_test "TARGET_X32"))
(match_operand 0 "memory_operand"))))
;; Similarly, but for tail calls, in which we cannot allow memory references.
Index: gcc/config/i386/constraints.md
===================================================================
--- gcc/config/i386/constraints.md 2011-08-31 20:51:42.000000000 +0100
+++ gcc/config/i386/constraints.md 2011-08-31 20:53:03.000000000 +0100
@@ -124,7 +124,7 @@ (define_constraint "z"
(define_constraint "w"
"@internal Call memory operand."
- (and (match_test "!TARGET_X32")
+ (and (not (match_test "TARGET_X32"))
(match_operand 0 "memory_operand")))
;; Integer constant constraints.
