[PATCH 0/2][GCC] Add one more pattern to RTL if-conversion

[Mikhail Maltsev]

Hi all!

Currently GCC generates rather bad code for the following test case:

int test(int a)
{
  return a % 2 != 0 ? 4 : 2;
}

The code looks like this:

test:
        andl    $1, %edi
        cmpl    $1, %edi
        sbbl    %eax, %eax
        andl    $-2, %eax
        addl    $4, %eax
        ret

Clang seems to generate optimal code:

test:
        andl    $1, %edi
        leal    2(%rdi,%rdi), %eax
        retq

After applying this series of 2 patches GCC generates:

test:
        movl    %edi, %eax
        andl    $1, %eax
        leal    2(%rax,%rax), %eax
        ret

-- 
Regards,
    Mikhail Maltsev