[Bug target/112817] RISC-V: RVV: provide a preprocessor macro for VLS codegen

[vineetg at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112817

--- Comment #6 from Vineet Gupta <vineetg at gcc dot gnu.org> ---
(In reply to JuzheZhong from comment #5)

> Support VLS codegen with -mrvv-vector-bits and attribute is reasonable to be
> landed on GCC-14.

I don't think that is the reqmt for this issue. Just defining the preprocessor
flag with existing gcc toggle for VLS codegen should be enough - as long as it
generates same macro as llvm.