https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112817
Bug ID: 112817
Summary: RISC-V: RVV: provide a preprocessor macro for VLS
codegen
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: vineetg at gcc dot gnu.org
CC: ewlu at rivosinc dot com, juzhe.zhong at rivai dot ai,
rdapp at gcc dot gnu.org
Target Milestone: ---
LLVM toggle for setting up fixed vector length using -mrvv-vector-bits=zvl
(which in turn derives VL from -march=...-vl256) also generates a preprocessor
define __riscv_v_fixed_vlen.
gcc doesn't, which is a bit of pain for downstream projects such as xsimd.
Granted the C-API document [1] doesn't specify this, generation by llvm and
more importantly usage in downstream projects seems good enough of a
requirement to have it in gcc as well.
[1] https://github.com/riscv-non-isa/riscv-c-api-doc/blob/master/riscv-c-api.md
