On Friday, 14th July 2000, "Rodney W. Grimes" wrote:
>> I suspect an interaction between the ATA driver and VIA chipsets,
>> because other than the network, that's all that is operating when I see
>> the underruns. And my Celeron with a ZX chipset is immune.
>
>I've seen them on just about everything, chipset doesn't seem to matter,
>IDE or SCSI doesn't seem to matter.
Well, maybe they are just a fact of life. But using just my vague knowledge
of how PCI works, it doesn't look inevitable to me. So I see bugs. :-)
>> Getting even more technical, it appears to me that the current driver
>> instructs the 21143 to poll for transmit packets (ie a small DMA)
>> every 80us even if there are none to be sent. I don't know what percentage
>> of bus time this might be, or even how to calculate it (got some time Rod?)
>
>I'll have to look at that. If it is a simple 32 bit read every 80uS
>thats something like .1515% of the PCI bandwidth, something that shouldn't
>matter much. (I assumed a simple 4 cycle PCI operation). Just how big
>is this DMA operation every 80uS?
I believe it is just one 32 bit read. But I don't understand that aspect
of the hardware very well yet. I also suspect that this polling adds
to the latency, but again, I haven't got to the end of that either.
Sometimes other things can distract you from even the most interesting
technical matter. :-)
Stephen.
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