>> I can push, but to answer Timo's question: I did not add P016 to nvenc >> because it is technically not correct to pass 12bit content through a 10bit >> surface - that will lead to truncation, rather than dithering. If you are >> telling us that nvenc supports 12bit >> input and will correctly dither, >> then great. Otherwise, it's more correct to not support and force dithering >> to happen through swscale. You could also write cuda accelerated dithering.
I have dropped the NVENC patch for now (we will build a P016 to P010 CUDA dithering filter). Attached the other patches, also taking into account some code formatting comments. Thanks, Yogender ----------------------------------------------------------------------------------- This email message is for the sole use of the intended recipient(s) and may contain confidential information. Any unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply email and destroy all copies of the original message. -----------------------------------------------------------------------------------
0002-hwcontext_cuda-Add-YUV444P16-format.patch
Description: 0002-hwcontext_cuda-Add-YUV444P16-format.patch
0001-hwupload_cuda-Add-P010-P016-and-YUV444P16-formats.patch
Description: 0001-hwupload_cuda-Add-P010-P016-and-YUV444P16-formats.patch
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