Gene Heskett wrote: > > With all due respect, trying to make an analog voltage level out of an > encoder, be it a quadrature or a pulse per increment device, the time lag > involved in converting the output pulse train into a smooth analog signal, > and making it work, is a good recipe to waste a week and still not get it > done to a usable state. That isn't saying its impossible, I can think of one > or two ways that might be made to work based on sawtooth wave generators > based on miller runup ideas, and doing a sample-hold on the resultant. But > that is going to be a pretty complex design that I as a C.E.T., would gladly > leave to those with more patience than I. Using the sample and hold, one > could fabricate a step function analog signal that was valid till the next > edge came out of the encoder. But even that on warming the wet ram would > mean it would be low if the motor was being accelerated, and high if it was > being decelerated, enough that stability during those phases would be very > problematic. > > This really does call for a very tightly coupled dc generator, with a finely > spaced commutator and lots of slots in the armature. I think it would be the > only way to get a degree by degree of rotation speed signal for this. > > I almost agree, except that Fanuc has been doing it this way since 1978, at least. They did go to higher resolution encoders, although not considered high at all in today's way of doing things. There used to be a chip made by ST that did a REALLY good job of this, mostly in analog, and it had identical sections for + and - movement and then summed them, so it eliminated encoder jitter from causing bad velocity values, which would be a problem in any scheme using s simple one-quadrant freq to voltage design.
US Digital's design is intended SPECIFICALLY for tach synthesis on velocity servo drives, it says so in the intro. Most DC tachs have NO slots, they use some form of trapezoidal coils on an ironless rotor. Jon ------------------------------------------------------------------------------ Download Intel® Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev _______________________________________________ Emc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-users
