ср, 30 вер. 2026 р. о 11:48 Thierry Reding <[email protected]> пише: > > On Wed, Sep 30, 2026 at 10:05:33AM +0300, Svyatoslav Ryhel wrote: > > The display controller in Tegra20/30 SoCs features an 8-bit SPI interface > > that closely resembles the MIPI DBI Type B protocol and is referred to as > > '8-bit CPU'. Each display controller provides two such interfaces, which > > can be used to send MIPI DCS commands to initialize and control the panel > > while image data is transmitted via 16/18/24-line RGB. > > > > Signed-off-by: Svyatoslav Ryhel <[email protected]> > > --- > > drivers/gpu/drm/tegra/Kconfig | 7 + > > drivers/gpu/drm/tegra/Makefile | 1 + > > drivers/gpu/drm/tegra/cpu-bridge.c | 427 +++++++++++++++++++++++++++++ > > 3 files changed, 435 insertions(+) > > create mode 100644 drivers/gpu/drm/tegra/cpu-bridge.c > > This doesn't need to be a separate driver. It should all live in dc.c. > Or maybe even rgb.c, since it uses pretty much the same pins and is > quite similar to it. >
I don't mind moving this to dc or rgb, my intention was to avoid bloating them with smth that is not used often and is present only on Tegra20 and Tegra30. > Thierry
