Hi Hugo, > -----Original Message----- > From: Hugo Villeneuve <[email protected]> > Sent: 17 March 2026 15:02 > Subject: Re: [PATCH 1/2] drm: renesas: rzg2l_mipi_dsi: Use fsleep() for 1ms > delay in D-PHY init > > Hi Biju, > > On Tue, 17 Mar 2026 12:36:00 +0000 > Biju <[email protected]> wrote: > > > From: Biju Das <[email protected]> > > > > Replace udelay(1) with fsleep(1000) in rzg2l_mipi_dsi_dphy_init() to > > follow the power-on sequence described in Figure 34.5 of section > > "34.4.2.1 Reset" of the RZ/G2L hardware manual Rev.1.50 May 2025. > > > > Signed-off-by: Biju Das <[email protected]> > > Seems to me like this should be backported to stable branches (missing Fixes > / Cc: stable tags)?
Agreed, will add fixes/stable tags. Cheers, Biju > > > > --- > > drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c > > b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c > > index a87a301326c7..e53b48e4de56 100644 > > --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c > > +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c > > @@ -528,7 +528,7 @@ static int rzg2l_mipi_dsi_dphy_init(struct > > rzg2l_mipi_dsi *dsi, > > if (ret < 0) > > return ret; > > > > - udelay(1); > > + fsleep(1000); > > > > return 0; > > } > > -- > > 2.43.0 > > > > > > > -- > Hugo Villeneuve <[email protected]>
