Reviewed-by: Hao A Wu <hao.a...@intel.com> Best Regards, Hao Wu
> -----Original Message----- > From: Lou, Yun <yun....@intel.com> > Sent: Monday, January 10, 2022 11:13 PM > To: devel@edk2.groups.io > Cc: Lou, Yun <yun....@intel.com>; Wu, Hao A <hao.a...@intel.com> > Subject: [PATCH v2 3/6] SourceLevelDebugPkg: Replace Opcode with the > corresponding instructions. > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3790 > > Replace Opcode with the corresponding instructions. > The code changes have been verified with CompareBuild.py tool, which > can be used to compare the results of two different EDK II builds to > determine if they generate the same binaries. > (tool link: https://github.com/mdkinney/edk2/tree/sandbox/CompareBuild) > > Signed-off-by: Jason Lou <yun....@intel.com> > Cc: Hao A Wu <hao.a...@intel.com> > --- > > SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/Asm > Funcs.nasm | 6 +++--- > > SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/Asm > Funcs.nasm | 6 +++--- > 2 files changed, 6 insertions(+), 6 deletions(-) > > diff --git > a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/As > mFuncs.nasm > b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/A > smFuncs.nasm > index 912256ba45..b5e5a96e34 100644 > --- > a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/As > mFuncs.nasm > +++ > b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/A > smFuncs.nasm > @@ -1,6 +1,6 @@ > > ;------------------------------------------------------------------------------ > > ; > > -; Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR> > > +; Copyright (c) 2010 - 2022, Intel Corporation. All rights reserved.<BR> > > ; SPDX-License-Identifier: BSD-2-Clause-Patent > > ; > > ; Module Name: > > @@ -321,7 +321,7 @@ NoExtrPush: > test edx, BIT24 ; Test for FXSAVE/FXRESTOR support. > > ; edx still contains result from CPUID above > > jz .2 > > - db 0xf, 0xae, 00000111y ;fxsave [edi] > > + fxsave [edi] > > .2: > > > > ;; save the exception data > > @@ -342,7 +342,7 @@ NoExtrPush: > cpuid ; use CPUID to determine if FXSAVE/FXRESTOR are > supported > > test edx, BIT24 ; Test for FXSAVE/FXRESTOR support > > jz .3 > > - db 0xf, 0xae, 00001110y ; fxrstor [esi] > > + fxrstor [esi] > > .3: > > add esp, 512 > > > > diff --git > a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/As > mFuncs.nasm > b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/As > mFuncs.nasm > index ccee120ca1..b1019e017b 100644 > --- > a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/As > mFuncs.nasm > +++ > b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/As > mFuncs.nasm > @@ -1,6 +1,6 @@ > > ;------------------------------------------------------------------------------ > > ; > > -; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR> > > +; Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR> > > ; SPDX-License-Identifier: BSD-2-Clause-Patent > > ; > > ; Module Name: > > @@ -293,7 +293,7 @@ NoExtrPush: > rep stosq > > pop rcx > > mov rdi, rsp > > - db 0xf, 0xae, 00000111y ;fxsave [rdi] > > + fxsave [rdi] > > > > ;; save the exception data > > push qword [rbp + 16] > > @@ -314,7 +314,7 @@ NoExtrPush: > add rsp, 8 > > > > mov rsi, rsp > > - db 0xf, 0xae, 00001110y ; fxrstor [rsi] > > + fxrstor [rsi] > > add rsp, 512 > > > > ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7; > > -- > 2.28.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#85501): https://edk2.groups.io/g/devel/message/85501 Mute This Topic: https://groups.io/mt/88325169/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
