On October 12, 2021 6:06 PM, Gerd Hoffmann wrote: > On Tue, Oct 05, 2021 at 11:39:17AM +0800, Min Xu wrote: > > RFC： https://bugzilla.tianocore.org/show_bug.cgi?id=3429 > > > > Intel TDX architecture does not prescribe a specific software > > convention to perform I/O from the guest TD. Guest TD providers have > > many choices to provide I/O to the guest. The common I/O models are > > emulated devices, para-virtualized devices, SRIOV devices and Direct Device > assignments. > > This monster patch needs splitting up. At least into io + mmio + fifo. > Adding the tdx helper functions can be a separate patch too. Ok, this patch will be split up into io+mmio+fifo in the next version. > > Calling CPUID should not be needed, we have a new fancy > ConfidentialComputing PCD for that now. The gUefiCpuPkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr is defined in UefiCpuPkg. While BaseIoLibIntrinsicSev is in MdePkg. If the ConfidentialComputing PCD is used, then UefiCpuPkg has to be included in BaseIoLibIntrinsicSev.inf. I check all the *.inf under MdePkg but no one *.inf include UefiCpuPkg. I am not sure if UefiCpuPkg can be included in BaseIoLibIntrinsicSev.inf. > > The new wrappers in IoLibFifo.c should also check for sev, so we have > something along the lines of ... > > switch (getpcd(cc)) { > case tdx: > TdxFifo(...) > break; > case sev: > SevFifo(...) > break; > default: > DefaultFifo(...) > break; > } > > ... instead of hiding the default case in IoFifoSev.nasm. > > Maybe that's something to cleanup for amd (Brijesh?) beforehand, so the > structure is there already and the tdx patches just need to add the "case > tdx:" > bits. Tdx patches can first use above structure. AMD can update it later. Either way is ok.
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