+ Hao Wu and Siyuan Fu for review.

> -----Original Message-----
> From: Leo Duran <leo.du...@amd.com>
> Sent: Wednesday, February 26, 2020 3:39 AM
> To: devel@edk2.groups.io
> Cc: Leo Duran <leo.du...@amd.com>; Dong, Eric <eric.d...@intel.com>; Ni, Ray 
> <ray...@intel.com>; Laszlo Ersek
> <ler...@redhat.com>
> Subject: [PATCH 2/2] UefiCpuPkg: MpInitLib: Exclude code no pertinent to AMD 
> processors.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2556
> 
> This patch uses the newly exported StandardSignatureIsAuthenticAMD function
> from LocalApicLib, to divert code paths not pertinent to AMD processors.
> Specifically, the PlatformId MSR and embedded Microcode patches are not
> relevant on AMD-based platforms.
> 
> Cc: Eric Dong <eric.d...@intel.com>
> Cc: Ray Ni <ray...@intel.com>
> Cc: Laszlo Ersek <ler...@redhat.com>
> Signed-off-by: Leo Duran <leo.du...@amd.com>
> ---
>  UefiCpuPkg/Library/MpInitLib/Microcode.c | 17 +++++++++++++++--
>  UefiCpuPkg/Library/MpInitLib/MpLib.c     | 11 +++++++++--
>  2 files changed, 24 insertions(+), 4 deletions(-)
> 
> diff --git a/UefiCpuPkg/Library/MpInitLib/Microcode.c 
> b/UefiCpuPkg/Library/MpInitLib/Microcode.c
> index 1562959..750681d 100644
> --- a/UefiCpuPkg/Library/MpInitLib/Microcode.c
> +++ b/UefiCpuPkg/Library/MpInitLib/Microcode.c
> @@ -2,6 +2,8 @@
>    Implementation of loading microcode on processors.
> 
>    Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved.<BR>
> +  Copyright (c) 2020, AMD Inc. All rights reserved.<BR>
> +
>    SPDX-License-Identifier: BSD-2-Clause-Patent
> 
>  **/
> @@ -97,9 +99,13 @@ MicrocodeDetect (
>    UINT32                                  ThreadId;
>    BOOLEAN                                 IsBspCallIn;
> 
> -  if (CpuMpData->MicrocodePatchRegionSize == 0) {
> +  //
> +  // NOTE: Embedded Microcode patches are not relevant on AMD platforms.
> +  //
> +  if (CpuMpData->MicrocodePatchRegionSize == 0 ||
> +      StandardSignatureIsAuthenticAMD ()) {
>      //
> -    // There is no microcode patches
> +    // There are no microcode patches
>      //
>      return;
>    }
> @@ -350,6 +356,13 @@ IsProcessorMatchedMicrocodePatch (
>    UINTN          Index;
>    CPU_AP_DATA    *CpuData;
> 
> +  //
> +  // NOTE: PlatformId or embedded Microcode patches are not relevant on AMD 
> platforms.
> +  //
> +  if (StandardSignatureIsAuthenticAMD ()) {
> +    return FALSE;
> +  }
> +
>    for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
>      CpuData = &CpuMpData->CpuData[Index];
>      if ((ProcessorSignature == CpuData->ProcessorSignature) &&
> diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c 
> b/UefiCpuPkg/Library/MpInitLib/MpLib.c
> index d0fbc17..290e7bf 100644
> --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
> +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
> @@ -2,6 +2,8 @@
>    CPU MP Initialize Library common functions.
> 
>    Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>
> +  Copyright (c) 2020, AMD Inc. All rights reserved.<BR>
> +
>    SPDX-License-Identifier: BSD-2-Clause-Patent
> 
>  **/
> @@ -564,8 +566,13 @@ InitializeApData (
>    CpuMpData->CpuData[ProcessorNumber].Waiting    = FALSE;
>    CpuMpData->CpuData[ProcessorNumber].CpuHealthy = (BistData == 0) ? TRUE : 
> FALSE;
> 
> -  PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);
> -  CpuMpData->CpuData[ProcessorNumber].PlatformId = (UINT8) 
> PlatformIdMsr.Bits.PlatformId;
> +  //
> +  // NOTE: PlatformId is not relevant on AMD platforms.
> +  //
> +  if (!StandardSignatureIsAuthenticAMD ()) {
> +    PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);
> +    CpuMpData->CpuData[ProcessorNumber].PlatformId = 
> (UINT8)PlatformIdMsr.Bits.PlatformId;
> +  }
> 
>    AsmCpuid (
>      CPUID_VERSION_INFO,
> --
> 2.7.4


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