Yes, I will add the reference spec in the header in V3. > -----Original Message----- > From: Ni, Ray <ray...@intel.com> > Sent: Thursday, November 7, 2019 12:47 PM > To: Yao, Jiewen <jiewen....@intel.com>; devel@edk2.groups.io > Cc: Chaganty, Rangasai V <rangasai.v.chaga...@intel.com>; Lou, Yun > <yun....@intel.com> > Subject: RE: [PATCH V2 1/6] IntelSiliconPkg/Include: Add Intel PciSecurity > definition. > > Jiewen, > You could use "UINT8 Digest[0];" in structure > INTEL_PCI_DIGEST_CAPABILITY_STRUCTURE. > > Same comments as what Sai raised, better to have the referenced spec in the > file header. > > Thanks, > Ray > > > -----Original Message----- > > From: Yao, Jiewen <jiewen....@intel.com> > > Sent: Thursday, October 31, 2019 8:31 PM > > To: devel@edk2.groups.io > > Cc: Ni, Ray <ray...@intel.com>; Chaganty, Rangasai V > > <rangasai.v.chaga...@intel.com>; Lou, Yun <yun....@intel.com> > > Subject: [PATCH V2 1/6] IntelSiliconPkg/Include: Add Intel PciSecurity > > definition. > > > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2303 > > > > Cc: Ray Ni <ray...@intel.com> > > Cc: Rangasai V Chaganty <rangasai.v.chaga...@intel.com> > > Cc: Yun Lou <yun....@intel.com> > > Signed-off-by: Jiewen Yao <jiewen....@intel.com> > > --- > > Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelPciSecurity.h | > > 66 ++++++++++++++++++++ > > 1 file changed, 66 insertions(+) > > > > diff --git > > a/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelPciSecurity.h > > b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelPciSecurity.h > > new file mode 100644 > > index 0000000000..a8c5483165 > > --- /dev/null > > +++ > > b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelPciSecurity.h > > @@ -0,0 +1,66 @@ > > +/** @file > > + Intel PCI security data structure > > + > > +Copyright (c) 2019, Intel Corporation. All rights reserved.<BR> > > +SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > +**/ > > + > > +#ifndef __INTEL_PCI_SECURITY_H__ > > +#define __INTEL_PCI_SECURITY_H__ > > + > > +#pragma pack(1) > > + > > +typedef struct { > > + UINT16 CapId; // 0x23: DVSEC > > + UINT16 CapVersion:4; // 1 > > + UINT16 NextOffset:12; > > + UINT16 DvSecVendorId; // 0x8086 > > + UINT16 DvSecRevision:4; // 1 > > + UINT16 DvSecLength:12; > > + UINT16 DvSecId; // 0x3E: Measure > > +} INTEL_PCI_DIGEST_CAPABILITY_HEADER; > > + > > +#define INTEL_PCI_CAPID_DVSEC 0x23 > > +#define INTEL_PCI_DVSEC_VENDORID_INTEL 0x8086 > > +#define INTEL_PCI_DVSEC_DVSECID_MEASUREMENT 0x3E > > + > > +typedef union { > > + struct { > > + UINT8 DigestModified:1; // RW1C > > + UINT8 Reserved0:7; > > + } Bits; > > + UINT8 Data; > > +} INTEL_PCI_DIGEST_DATA_MODIFIED; > > + > > +#define INTEL_PCI_DIGEST_MODIFIED BIT0 > > + > > +typedef union { > > + struct { > > + UINT8 Digest0Valid:1; // RO > > + UINT8 Digest0Locked:1; // RO > > + UINT8 Digest1Valid:1; // RO > > + UINT8 Digest1Locked:1; // RO > > + UINT8 Reserved1:4; > > + } Bits; > > + UINT8 Data; > > +} INTEL_PCI_DIGEST_DATA_VALID; > > + > > +#define INTEL_PCI_DIGEST_0_VALID BIT0 > > +#define INTEL_PCI_DIGEST_0_LOCKED BIT1 > > +#define INTEL_PCI_DIGEST_1_VALID BIT2 > > +#define INTEL_PCI_DIGEST_1_LOCKED BIT3 > > + > > +typedef struct { > > + INTEL_PCI_DIGEST_DATA_MODIFIED Modified; // RW1C > > + INTEL_PCI_DIGEST_DATA_VALID Valid; // RO > > + UINT16 TcgAlgId; // RO > > + UINT8 FirmwareID; // RO > > + UINT8 Reserved; > > +//UINT8 Digest[]; > > +} INTEL_PCI_DIGEST_CAPABILITY_STRUCTURE; > > + > > +#pragma pack() > > + > > +#endif > > + > > -- > > 2.19.2.windows.1
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