On 10/16/2016 2:40 AM, Jeff Guo wrote:
> As X722 extracts IPv4 header to Field Vector different with XL710/X710,
> need to corresponding to modify the fields of IPv4 header in input set
> to map different default Field Vector Table of different NICs.
>
> Signed-off-by: Jeff Guo <jia.guo at intel.com>
>
> ---
> v2:
> fix compile error when x722 macro is not defined and simplify
> the code to avoid duplication.
> ---
> drivers/net/i40e/i40e_ethdev.c | 73
> ++++++++++++++++++++++++++++++++++--------
> 1 file changed, 60 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index 920fd6d..7895c11 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -211,6 +211,16 @@
> #define I40E_REG_INSET_L3_SRC_IP4 0x0001800000000000ULL
> /* Destination IPv4 address */
> #define I40E_REG_INSET_L3_DST_IP4 0x0000001800000000ULL
> +#ifdef X722_SUPPORT
If agreed on removing #ifdef X722_SUPPORT, please apply this into this
patch too.
> +/* Source IPv4 address for X722 */
> +#define I40E_X722_REG_INSET_L3_SRC_IP4 0x0006000000000000ULL
> +/* Destination IPv4 address for X722 */
> +#define I40E_X722_REG_INSET_L3_DST_IP4 0x0000060000000000ULL
> +/* IPv4 Protocol */
> +#define I40E_X722_REG_INSET_L3_IP4_PROTO 0x0010000000000000ULL
> +/* IPv4 Time to Live */
> +#define I40E_X722_REG_INSET_L3_IP4_TTL 0x0010000000000000ULL
> +#endif
> /* IPv4 Type of Service (TOS) */
> #define I40E_REG_INSET_L3_IP4_TOS 0x0040000000000000ULL
> /* IPv4 Protocol */
> @@ -7581,7 +7591,7 @@ i40e_parse_input_set(uint64_t *inset,
> * and vice versa
> */
> static uint64_t
> -i40e_translate_input_set_reg(uint64_t input)
> +i40e_translate_input_set_reg(enum i40e_mac_type type, uint64_t input)
> {
> uint64_t val = 0;
> uint16_t i;
> @@ -7589,17 +7599,13 @@ i40e_translate_input_set_reg(uint64_t input)
> static const struct {
> uint64_t inset;
> uint64_t inset_reg;
> - } inset_map[] = {
> + } inset_map_common[] = {
> {I40E_INSET_DMAC, I40E_REG_INSET_L2_DMAC},
> {I40E_INSET_SMAC, I40E_REG_INSET_L2_SMAC},
> {I40E_INSET_VLAN_OUTER, I40E_REG_INSET_L2_OUTER_VLAN},
> {I40E_INSET_VLAN_INNER, I40E_REG_INSET_L2_INNER_VLAN},
> {I40E_INSET_LAST_ETHER_TYPE, I40E_REG_INSET_LAST_ETHER_TYPE},
> - {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
> - {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
> {I40E_INSET_IPV4_TOS, I40E_REG_INSET_L3_IP4_TOS},
> - {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
> - {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
> {I40E_INSET_IPV6_SRC, I40E_REG_INSET_L3_SRC_IP6},
> {I40E_INSET_IPV6_DST, I40E_REG_INSET_L3_DST_IP6},
> {I40E_INSET_IPV6_TC, I40E_REG_INSET_L3_IP6_TC},
> @@ -7627,16 +7633,56 @@ i40e_translate_input_set_reg(uint64_t input)
> {I40E_INSET_FLEX_PAYLOAD_W7, I40E_REG_INSET_FLEX_PAYLOAD_WORD7},
> {I40E_INSET_FLEX_PAYLOAD_W8, I40E_REG_INSET_FLEX_PAYLOAD_WORD8},
> };
> +#ifdef X722_SUPPORT
> +
> + /* some different registers map in x722*/
> + static const struct {
> + uint64_t inset;
> + uint64_t inset_reg;
> + } inset_map_diff_x722[] = {
Can you please extract struct declaration, and re-use that to create
instances.
> + {I40E_INSET_IPV4_SRC, I40E_X722_REG_INSET_L3_SRC_IP4},
> + {I40E_INSET_IPV4_DST, I40E_X722_REG_INSET_L3_DST_IP4},
> + {I40E_INSET_IPV4_PROTO, I40E_X722_REG_INSET_L3_IP4_PROTO},
> + {I40E_INSET_IPV4_TTL, I40E_X722_REG_INSET_L3_IP4_TTL},
> + };
> +#endif
> +
> + static const struct {
> + uint64_t inset;
> + uint64_t inset_reg;
> + } inset_map_diff_not_x722[] = {
> + {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
> + {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
> + {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
> + {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
> + };
>
> if (input == 0)
> return val;
>
> /* Translate input set to register aware inset */
> - for (i = 0; i < RTE_DIM(inset_map); i++) {
> - if (input & inset_map[i].inset)
> - val |= inset_map[i].inset_reg;
> +#ifdef X722_SUPPORT
> + if (type == I40E_MAC_X722) {
> + for (i = 0; i < RTE_DIM(inset_map_diff_x722); i++) {
> + if (input & inset_map_diff_x722[i].inset)
> + val |= inset_map_diff_x722[i].inset_reg;
> + }
> + } else {
> + for (i = 0; i < RTE_DIM(inset_map_diff_not_x722); i++) {
> + if (input & inset_map_diff_not_x722[i].inset)
> + val |= inset_map_diff_not_x722[i].inset_reg;
> + }
> + }
> +#else
Since #ifdef removed, #else part should be gone.
> + for (i = 0; i < RTE_DIM(inset_map_diff_not_x722); i++) {
> + if (input & inset_map_diff_not_x722[i].inset)
> + val |= inset_map_diff_not_x722[i].inset_reg;
> + }
> +#endif
> + for (i = 0; i < RTE_DIM(inset_map_common); i++) {
> + if (input & inset_map_common[i].inset)
> + val |= inset_map_common[i].inset_reg;
> }
> -
> return val;
> }
>
> @@ -7719,7 +7765,8 @@ i40e_filter_input_set_init(struct i40e_pf *pf)
> I40E_INSET_MASK_NUM_REG);
> if (num < 0)
> return;
> - inset_reg = i40e_translate_input_set_reg(input_set);
> + inset_reg = i40e_translate_input_set_reg(hw->mac.type,
> + input_set);
>
> i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0),
> (uint32_t)(inset_reg & UINT32_MAX));
> @@ -7810,7 +7857,7 @@ i40e_hash_filter_inset_select(struct i40e_hw *hw,
> if (num < 0)
> return -EINVAL;
>
> - inset_reg |= i40e_translate_input_set_reg(input_set);
> + inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set);
>
> i40e_check_write_reg(hw, I40E_GLQF_HASH_INSET(0, pctype),
> (uint32_t)(inset_reg & UINT32_MAX));
> @@ -7888,7 +7935,7 @@ i40e_fdir_filter_inset_select(struct i40e_pf *pf,
> if (num < 0)
> return -EINVAL;
>
> - inset_reg |= i40e_translate_input_set_reg(input_set);
> + inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set);
>
> i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0),
> (uint32_t)(inset_reg & UINT32_MAX));
>
