[AMD Official Use Only - AMD Internal Distribution Only]
Acked-by: Selwin Sebastian<selwin.sebast...@amd.com>
-----Original Message-----
From: Ande, Venkat Kumar <venkatkumar.a...@amd.com>
Sent: Tuesday, May 7, 2024 6:13 PM
To: dev@dpdk.org
Cc: Sebastian, Selwin <selwin.sebast...@amd.com>; Ande, Venkat Kumar
<venkatkumar.a...@amd.com>; sta...@dpdk.org
Subject: [PATCH v2 03/25] net/axgbe: fix fluctuations for 1G BELFUSE SFP
Frequent link up/down events can happen when a Bel Fuse SFP part is connected
to the amd-xgbe device. Try to avoid the frequent link issues by resetting the
PHY as documented in Bel Fuse SFP datasheets.
Without the fix user will see continuous port link up and down.
Fixes: a5c7273771e8 ("net/axgbe: add phy programming APIs")
Cc: sta...@dpdk.org
Signed-off-by: Venkat Kumar Ande <venkatkumar.a...@amd.com>
---
drivers/net/axgbe/axgbe_phy_impl.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/axgbe/axgbe_phy_impl.c
b/drivers/net/axgbe/axgbe_phy_impl.c
index 54fe9faae0..ee9dcbe3da 100644
--- a/drivers/net/axgbe/axgbe_phy_impl.c
+++ b/drivers/net/axgbe/axgbe_phy_impl.c
@@ -578,6 +578,9 @@ static bool axgbe_phy_belfuse_parse_quirks(struct
axgbe_port *pdata)
AXGBE_BEL_FUSE_VENDOR, strlen(AXGBE_BEL_FUSE_VENDOR)))
return false;
+ /* Reset PHY - wait for self-clearing reset bit to clear */
+ pdata->phy_if.phy_impl.reset(pdata);
+
if (!memcmp(&sfp_eeprom->base[AXGBE_SFP_BASE_VENDOR_PN],
AXGBE_BEL_FUSE_PARTNO, strlen(AXGBE_BEL_FUSE_PARTNO))) {
phy_data->sfp_base = AXGBE_SFP_BASE_1000_SX;
--
2.34.1
