> -----Original Message----- > From: Ciara Power <ciara.po...@intel.com> > Sent: Saturday, August 8, 2020 12:59 AM > To: dev@dpdk.org > Cc: bruce.richard...@intel.com; Ciara Power <ciara.po...@intel.com>; > John Daley (johndale) <johnd...@cisco.com>; Hyong Youb Kim (hyonkim) > <hyon...@cisco.com> > Subject: [PATCH 20.11 06/12] net/enic: add checks for max SIMD bitwidth > > When choosing a vector path to take, an extra condition must be > satisfied to ensure the max SIMD bitwidth allows for the CPU enabled > path. > > Cc: John Daley <johnd...@cisco.com> > Cc: Hyong Youb Kim <hyon...@cisco.com> > > Signed-off-by: Ciara Power <ciara.po...@intel.com> > --- > drivers/net/enic/enic_rxtx_vec_avx2.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/enic/enic_rxtx_vec_avx2.c > b/drivers/net/enic/enic_rxtx_vec_avx2.c > index 676b9f5fdb..5db43bdbb8 100644 > --- a/drivers/net/enic/enic_rxtx_vec_avx2.c > +++ b/drivers/net/enic/enic_rxtx_vec_avx2.c > @@ -821,7 +821,8 @@ enic_use_vector_rx_handler(struct rte_eth_dev > *eth_dev) > fconf = ð_dev->data->dev_conf.fdir_conf; > if (fconf->mode != RTE_FDIR_MODE_NONE) > return false; > - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) { > + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) && > + rte_get_max_simd_bitwidth() >= > RTE_MAX_256_SIMD) { > ENICPMD_LOG(DEBUG, " use the non-scatter avx2 Rx > handler"); > eth_dev->rx_pkt_burst = &enic_noscatter_vec_recv_pkts; > enic->use_noscatter_vec_rx_handler = 1; > -- > 2.17.1
Acked-by: Hyong Youb Kim <hyon...@cisco.com> Thanks.. -Hyong