When choosing a vector path to take, an extra condition must be
satisfied to ensure the max SIMD bitwidth allows for the CPU enabled
path.
Cc: Matan Azrad <ma...@mellanox.com>
Cc: Shahaf Shuler <shah...@mellanox.com>
Cc: Viacheslav Ovsiienko <viachesl...@mellanox.com>
Signed-off-by: Ciara Power <ciara.po...@intel.com>
---
drivers/net/mlx5/mlx5_ethdev.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index cefb45064e..f322f82029 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -479,7 +479,8 @@ mlx5_select_rx_function(struct rte_eth_dev *dev)
eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst;
MLX5_ASSERT(dev != NULL);
- if (mlx5_check_vec_rx_support(dev) > 0) {
+ if (mlx5_check_vec_rx_support(dev) > 0 &&
+ rte_get_max_simd_bitwidth() >= RTE_MAX_128_SIMD) {
rx_pkt_burst = mlx5_rx_burst_vec;
DRV_LOG(DEBUG, "port %u selected Rx vectorized function",
dev->data->port_id);
--
2.17.1
