On Tue, Mar 24, 2020 at 12:49 PM Kevin Laatz <kevin.la...@intel.com> wrote: > This patch set adds CPU flags which will enable the detection of ISA > features available on more recent x86 based CPUs. > > The CPUID leaf information can be found in Section 1.7 of this > document: > https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf > > Kevin Laatz (17): > eal/cpuflags: add avx512 doubleword and quadword > eal/cpuflags: add avx512 integer fused multiply-add > eal/cpuflags: add avx512 conflict detection > eal/cpuflags: add avx512 byte and word > eal/cpuflags: add avx512 vector length > eal/cpuflags: add avx512 vector bit manipulation > eal/cpuflags: add avx512 vector bit manipulation 2 > eal/cpuflags: add galois field new instructions > eal/cpuflags: add vector AES > eal/cpuflags: add vector carry-less multiply > eal/cpuflags: add avx512 vector neural network instructions > eal/cpuflags: add avx512 bit algorithms > eal/cpuflags: add avx512 vector popcount > eal/cpuflags: add cache line demote > eal/cpuflags: add direct store instructions > eal/cpuflags: add direct store instructions 64B > eal/cpuflags: add avx512 two register intersection > > lib/librte_eal/common/arch/x86/rte_cpuflags.c | 18 ++++++++++++++++++ > .../common/include/arch/x86/rte_cpuflags.h | 18 ++++++++++++++++++ > 2 files changed, 36 insertions(+)
You are just adding definitions, the review should be straightforward for guys in the know. I can see little value in splitting in that many patches. -- David Marchand
