Add the CPU flag AVX-512 for bit algorithm instructions.
Signed-off-by: Kevin Laatz <kevin.la...@intel.com>
---
lib/librte_eal/common/arch/x86/rte_cpuflags.c | 1 +
lib/librte_eal/common/include/arch/x86/rte_cpuflags.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/lib/librte_eal/common/arch/x86/rte_cpuflags.c
b/lib/librte_eal/common/arch/x86/rte_cpuflags.c
index f82d45647..472becfed 100644
--- a/lib/librte_eal/common/arch/x86/rte_cpuflags.c
+++ b/lib/librte_eal/common/arch/x86/rte_cpuflags.c
@@ -132,6 +132,7 @@ const struct feature_entry rte_cpu_feature_table[] = {
FEAT_DEF(VAES, 0x00000007, 0, RTE_REG_ECX, 9)
FEAT_DEF(VPCLMULQDQ, 0x00000007, 0, RTE_REG_ECX, 10)
FEAT_DEF(AVX512VNNI, 0x00000007, 0, RTE_REG_ECX, 11)
+ FEAT_DEF(AVX512BITALG, 0x00000007, 0, RTE_REG_ECX, 12)
};
int
diff --git a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h
b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h
index caf92b9f3..fe4144fc0 100644
--- a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h
+++ b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h
@@ -124,6 +124,7 @@ enum rte_cpu_flag_t {
RTE_CPUFLAG_VAES, /**< Vector AES */
RTE_CPUFLAG_VPCLMULQDQ, /**< Vector Carry-less Multiply */
RTE_CPUFLAG_AVX512VNNI, /**< AVX512 Vector Neural Network
Instructions */
+ RTE_CPUFLAG_AVX512BITALG, /**< AVX512 Bit Algorithms */
/* The last item */
RTE_CPUFLAG_NUMFLAGS, /**< This should always be the
last! */
--
2.17.1
