On Thu, Jul 25, 2019 at 05:29:03PM +0100, hgovindh wrote:
> Fix unaligned memory access when reading IPv6 header which
> leads to segmentation fault by changing aligned memory read
> to unaligned memory read.
>
> Bugzilla ID: 279
> Fixes: 64d3955de1de ("examples/l3fwd: fix ARM build")
> Cc: maciej.cze...@caviumnetworks.com
> Cc: sta...@dpdk.org
> Signed-off-by: hgovindh <hariprasad.govindhara...@intel.com>
> ---
> V2: Added functions which will do unaligned load based on the
> underlying architecture
> ---
> ---
> examples/l3fwd/l3fwd_em.c | 26 ++++++++++++++++++++++++--
> 1 file changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c
> index fa8f82be6..f2641586b 100644
> --- a/examples/l3fwd/l3fwd_em.c
> +++ b/examples/l3fwd/l3fwd_em.c
> @@ -244,6 +244,29 @@ em_mask_key(void *key, xmm_t mask)
> #error No vector engine (SSE, NEON, ALTIVEC) available, check your toolchain
> #endif
>
> +#if defined(RTE_MACHINE_CPUFLAG_SSE2)
> +static inline xmm_t
> +em_load_key(void *key)
> +{
> + return _mm_loadu_si128((__m128i *)(key));
> +}
> +#elif defined(RTE_MACHINE_CPUFLAG_NEON)
> +static inline xmm_t
> +em_load_key(void *key)
> +{
> + return vld1q_s32((int32_t *)key);
> +}
> +#elif defined(RTE_MACHINE_CPUFLAG_ALTIVEC)
> +static inline xmm_t
> +em_load_key(void *key)
> +{
> + return vec_ld(0, (xmm_t *)(key));
> +}
Two minor nits:
Since you are passing in a void *, no typecasts should be needed in any of
these functions.
Also, is it neater if you just have the ifdefs in the middle of the
function, rather than duplicating the function prototype each time? Third
option is to make the load a single-line macro rather than 5-lines of a
function.
/Bruce
