+Idan Werpoler. From: Pradeep Satyanarayana <prad...@us.ibm.com> Sent: Sunday, March 24, 2019 7:38 PM To: Shahaf Shuler <shah...@mellanox.com> Cc: bruce.richard...@intel.com; Chao Zhu <chao...@linux.vnet.ibm.com>; Dekel Peled <dek...@mellanox.com>; dev@dpdk.org; David Christensen <d...@ibm.com>; honnappa.nagaraha...@arm.com; konstantin.anan...@intel.com; ola.liljed...@arm.com; Ori Kam <or...@mellanox.com>; Thomas Monjalon <tho...@monjalon.net>; David Wilder <wil...@us.ibm.com>; Yongseok Koh <ys...@mellanox.com> Subject: RE: [PATCH] eal/ppc: remove fix of memory barrier for IBM POWER
Shahaf Shuler <shah...@mellanox.com<mailto:shah...@mellanox.com>> wrote on 03/23/2019 11:37:42 PM: > From: Shahaf Shuler <shah...@mellanox.com<mailto:shah...@mellanox.com>> > To: "prad...@us.ibm.com<mailto:prad...@us.ibm.com>" > <prad...@us.ibm.com<mailto:prad...@us.ibm.com>>, Thomas Monjalon > <tho...@monjalon.net<mailto:tho...@monjalon.net>> > Cc: "bruce.richard...@intel.com<mailto:bruce.richard...@intel.com>" > <bruce.richard...@intel.com<mailto:bruce.richard...@intel.com>>, Chao > Zhu <chao...@linux.vnet.ibm.com<mailto:chao...@linux.vnet.ibm.com>>, Dekel > Peled <dek...@mellanox.com<mailto:dek...@mellanox.com>>, > "dev@dpdk.org<mailto:dev@dpdk.org>" <dev@dpdk.org<mailto:dev@dpdk.org>>, > David Christensen <d...@ibm.com<mailto:d...@ibm.com>>, > "honnappa.nagaraha...@arm.com<mailto:honnappa.nagaraha...@arm.com>" > <honnappa.nagaraha...@arm.com<mailto:honnappa.nagaraha...@arm.com>>, > "konstantin.anan...@intel.com<mailto:konstantin.anan...@intel.com>" > <konstantin.anan...@intel.com<mailto:konstantin.anan...@intel.com>>, > "ola.liljed...@arm.com<mailto:ola.liljed...@arm.com>" > <ola.liljed...@arm.com<mailto:ola.liljed...@arm.com>>, Ori Kam > <or...@mellanox.com<mailto:or...@mellanox.com>>, David Wilder > <wil...@us.ibm.com<mailto:wil...@us.ibm.com>>, Yongseok Koh > <ys...@mellanox.com<mailto:ys...@mellanox.com>> > Date: 03/23/2019 11:37 PM > Subject: RE: [PATCH] eal/ppc: remove fix of memory barrier for IBM POWER > > Pradeep, > > Pradeep Satyanarayana wrote on Saturday, March 23, 2019 12:58 AM > >Thomas Monjalon <tho...@monjalon.net<mailto:tho...@monjalon.net>> wrote on > >03/22/2019 10:51:17 AM: > >> Date: 03/22/2019 10:51 AM > >> Subject: Re: [PATCH] eal/ppc: remove fix of memory barrier for IBM POWER > >> > >> 22/03/2019 16:30, Pradeep Satyanarayana: > >> > Thomas Monjalon <tho...@monjalon.net<mailto:tho...@monjalon.net>> wrote > >> > on 03/22/2019 01:49:03 AM: > >> > > 22/03/2019 02:40, Pradeep Satyanarayana: > >> > > > - rte_[rw]mb (general memory barrier) --> should be lwsync > >> > > > >> > > This is what may be discussed. > >> > > The assumption is that the general memory barrier should cover > >> > > all cases (CPU caches, SMP and I/O). > >> > > That's why we think it should "sync" for Power. > >> > > >> > In that case, at a minimum we must de-link rte_smp_[rw]mb from rte_[rw]mb > >> > and retain it as lwsync. Agreed? > >> > >> I have no clue about what is needed for SMP barrier in Power. > >> As long as it works as expected, no problem. > >> > > > >We will try that out and report back here, later next week > > Till then, i think there are 2 orthogonal issues: > 1. ppc rte_wmb is incorrect > 2. ppc rte_smp_[rw]mb may be improved. > > for #1 the current patch from Dekel seems to be OK. do you agree? > for #2 i guess you will check and come back w/ patch/answer? That has been the line of thinking. However, we need to do some extensive testing to confirm that it all holds up. Thanks Pradeep prad...@us.ibm.com<mailto:prad...@us.ibm.com>
