src/pcidb/ati_pciids.csv | 28 ++++++++++++++--------------
src/radeon_chipinfo_gen.h | 28 ++++++++++++++--------------
src/radeon_crtc.c | 2 ++
src/radeon_output.c | 1 +
4 files changed, 31 insertions(+), 28 deletions(-)
New commits:
commit 30cab1dbebb7bdb925f2fe9f91b84183312bbbfd
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Wed Jan 2 15:41:01 2008 -0500
RADEON: Make sure all old IGP chips have HasSingleDac set
fix the csv file and re-gen the headers.
diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv
index a62e8a5..b297a6d 100644
--- a/src/pcidb/ati_pciids.csv
+++ b/src/pcidb/ati_pciids.csv
@@ -4,8 +4,8 @@
"0x3154","RV380_3154","RV380",1,,,,,"ATI FireGL M24 GL 3154 (PCIE)"
"0x3E50","RV380_3E50","RV380",,,,,,"ATI Radeon X600 (RV380) 3E50 (PCIE)"
"0x3E54","RV380_3E54","RV380",,,,,,"ATI FireGL V3200 (RV380) 3E54 (PCIE)"
-"0x4136","RS100_4136","RS100",,1,,,,"ATI Radeon IGP320 (A3) 4136"
-"0x4137","RS200_4137","RS200",,1,,,,"ATI Radeon IGP330/340/350 (A4) 4137"
+"0x4136","RS100_4136","RS100",,1,,,1,"ATI Radeon IGP320 (A3) 4136"
+"0x4137","RS200_4137","RS200",,1,,,1,"ATI Radeon IGP330/340/350 (A4) 4137"
"0x4144","R300_AD","R300",,,,,,"ATI Radeon 9500 AD (AGP)"
"0x4145","R300_AE","R300",,,,,,"ATI Radeon 9500 AE (AGP)"
"0x4146","R300_AF","R300",,,,,,"ATI Radeon 9600TX AF (AGP)"
@@ -22,14 +22,14 @@
"0x4155","RV350_4155","RV350",,,,,,"ATI Radeon 9650"
"0x4156","RV350_AV","RV350",,,,,,"ATI FireGL RV360 AV (AGP)"
"0x4158","MACH32","MACH32",,,,,,
-"0x4237","RS250_4237","RS200",,1,,,,"ATI Radeon 7000 IGP (A4+) 4237"
+"0x4237","RS250_4237","RS200",,1,,,1,"ATI Radeon 7000 IGP (A4+) 4237"
"0x4242","R200_BB","R200",,,,1,,"ATI Radeon 8500 AIW BB (AGP)"
"0x4243","R200_BC","R200",,,,1,,"ATI Radeon 8500 AIW BC (AGP)"
-"0x4336","RS100_4336","RS100",1,1,,,,"ATI Radeon IGP320M (U1) 4336"
-"0x4337","RS200_4337","RS200",1,1,,,,"ATI Radeon IGP330M/340M/350M (U2) 4337"
+"0x4336","RS100_4336","RS100",1,1,,,1,"ATI Radeon IGP320M (U1) 4336"
+"0x4337","RS200_4337","RS200",1,1,,,1,"ATI Radeon IGP330M/340M/350M (U2) 4337"
"0x4354","MACH64CT","MACH64",,,,,,
"0x4358","MACH64CX","MACH64",,,,,,
-"0x4437","RS250_4437","RS200",1,1,,,,"ATI Radeon Mobility 7000 IGP 4437"
+"0x4437","RS250_4437","RS200",1,1,,,1,"ATI Radeon Mobility 7000 IGP 4437"
"0x4554","MACH64ET","MACH64",,,,,,
"0x4742","MACH64GB","MACH64",,,,,,
"0x4744","MACH64GD","MACH64",,,,,,
@@ -311,14 +311,14 @@
"0x7291","RV560_7291","RV560",,,,,,"ATI Radeon X1650"
"0x7293","RV560_7293","RV560",,,,,,"ATI Radeon X1650"
"0x7297","RV560_7297","RV560",,,,,,"ATI RV560"
-"0x7834","RS350_7834","RS300",,1,,,,"ATI Radeon 9100 PRO IGP 7834"
-"0x7835","RS350_7835","RS300",1,1,,,,"ATI Radeon Mobility 9200 IGP 7835"
-"0x791E","RS690_791E","RS690",,1,,,,"ATI Radeon X1200"
-"0x791F","RS690_791F","RS690",,1,,,,"ATI Radeon X1200"
-"0x796C","RS740_796C","RS740",,1,,,,"ATI RS740"
-"0x796D","RS740_796D","RS740",,1,,,,"ATI RS740M"
-"0x796E","RS740_796E","RS740",,1,,,,"ATI RS740"
-"0x796F","RS740_796F","RS740",,1,,,,"ATI RS740M"
+"0x7834","RS350_7834","RS300",,1,,,1,"ATI Radeon 9100 PRO IGP 7834"
+"0x7835","RS350_7835","RS300",1,1,,,1,"ATI Radeon Mobility 9200 IGP 7835"
+"0x791E","RS690_791E","RS690",,1,,,1,"ATI Radeon X1200"
+"0x791F","RS690_791F","RS690",,1,,,1,"ATI Radeon X1200"
+"0x796C","RS740_796C","RS740",,1,,,1,"ATI RS740"
+"0x796D","RS740_796D","RS740",,1,,,1,"ATI RS740M"
+"0x796E","RS740_796E","RS740",,1,,,1,"ATI RS740"
+"0x796F","RS740_796F","RS740",,1,,,1,"ATI RS740M"
"0x9400","R600_9400","R600",,,,,,"ATI Radeon HD 2900 XT"
"0x9401","R600_9401","R600",,,,,,"ATI Radeon HD 2900 XT"
"0x9402","R600_9402","R600",,,,,,"ATI Radeon HD 2900 XT"
diff --git a/src/radeon_chipinfo_gen.h b/src/radeon_chipinfo_gen.h
index cf70557..2d92ac5 100644
--- a/src/radeon_chipinfo_gen.h
+++ b/src/radeon_chipinfo_gen.h
@@ -5,8 +5,8 @@ RADEONCardInfo RADEONCards[] = {
{ 0x3154, CHIP_FAMILY_RV380, 1, 0, 0, 0, 0 },
{ 0x3E50, CHIP_FAMILY_RV380, 0, 0, 0, 0, 0 },
{ 0x3E54, CHIP_FAMILY_RV380, 0, 0, 0, 0, 0 },
- { 0x4136, CHIP_FAMILY_RS100, 0, 1, 0, 0, 0 },
- { 0x4137, CHIP_FAMILY_RS200, 0, 1, 0, 0, 0 },
+ { 0x4136, CHIP_FAMILY_RS100, 0, 1, 0, 0, 1 },
+ { 0x4137, CHIP_FAMILY_RS200, 0, 1, 0, 0, 1 },
{ 0x4144, CHIP_FAMILY_R300, 0, 0, 0, 0, 0 },
{ 0x4145, CHIP_FAMILY_R300, 0, 0, 0, 0, 0 },
{ 0x4146, CHIP_FAMILY_R300, 0, 0, 0, 0, 0 },
@@ -22,12 +22,12 @@ RADEONCardInfo RADEONCards[] = {
{ 0x4154, CHIP_FAMILY_RV350, 0, 0, 0, 0, 0 },
{ 0x4155, CHIP_FAMILY_RV350, 0, 0, 0, 0, 0 },
{ 0x4156, CHIP_FAMILY_RV350, 0, 0, 0, 0, 0 },
- { 0x4237, CHIP_FAMILY_RS200, 0, 1, 0, 0, 0 },
+ { 0x4237, CHIP_FAMILY_RS200, 0, 1, 0, 0, 1 },
{ 0x4242, CHIP_FAMILY_R200, 0, 0, 0, 1, 0 },
{ 0x4243, CHIP_FAMILY_R200, 0, 0, 0, 1, 0 },
- { 0x4336, CHIP_FAMILY_RS100, 1, 1, 0, 0, 0 },
- { 0x4337, CHIP_FAMILY_RS200, 1, 1, 0, 0, 0 },
- { 0x4437, CHIP_FAMILY_RS200, 1, 1, 0, 0, 0 },
+ { 0x4336, CHIP_FAMILY_RS100, 1, 1, 0, 0, 1 },
+ { 0x4337, CHIP_FAMILY_RS200, 1, 1, 0, 0, 1 },
+ { 0x4437, CHIP_FAMILY_RS200, 1, 1, 0, 0, 1 },
{ 0x4966, CHIP_FAMILY_RV250, 0, 0, 0, 0, 0 },
{ 0x4967, CHIP_FAMILY_RV250, 0, 0, 0, 0, 0 },
{ 0x4A48, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
@@ -230,14 +230,14 @@ RADEONCardInfo RADEONCards[] = {
{ 0x7291, CHIP_FAMILY_RV560, 0, 0, 0, 0, 0 },
{ 0x7293, CHIP_FAMILY_RV560, 0, 0, 0, 0, 0 },
{ 0x7297, CHIP_FAMILY_RV560, 0, 0, 0, 0, 0 },
- { 0x7834, CHIP_FAMILY_RS300, 0, 1, 0, 0, 0 },
- { 0x7835, CHIP_FAMILY_RS300, 1, 1, 0, 0, 0 },
- { 0x791E, CHIP_FAMILY_RS690, 0, 1, 0, 0, 0 },
- { 0x791F, CHIP_FAMILY_RS690, 0, 1, 0, 0, 0 },
- { 0x796C, CHIP_FAMILY_RS740, 0, 1, 0, 0, 0 },
- { 0x796D, CHIP_FAMILY_RS740, 0, 1, 0, 0, 0 },
- { 0x796E, CHIP_FAMILY_RS740, 0, 1, 0, 0, 0 },
- { 0x796F, CHIP_FAMILY_RS740, 0, 1, 0, 0, 0 },
+ { 0x7834, CHIP_FAMILY_RS300, 0, 1, 0, 0, 1 },
+ { 0x7835, CHIP_FAMILY_RS300, 1, 1, 0, 0, 1 },
+ { 0x791E, CHIP_FAMILY_RS690, 0, 1, 0, 0, 1 },
+ { 0x791F, CHIP_FAMILY_RS690, 0, 1, 0, 0, 1 },
+ { 0x796C, CHIP_FAMILY_RS740, 0, 1, 0, 0, 1 },
+ { 0x796D, CHIP_FAMILY_RS740, 0, 1, 0, 0, 1 },
+ { 0x796E, CHIP_FAMILY_RS740, 0, 1, 0, 0, 1 },
+ { 0x796F, CHIP_FAMILY_RS740, 0, 1, 0, 0, 1 },
{ 0x9400, CHIP_FAMILY_R600, 0, 0, 0, 0, 0 },
{ 0x9401, CHIP_FAMILY_R600, 0, 0, 0, 0, 0 },
{ 0x9402, CHIP_FAMILY_R600, 0, 0, 0, 0, 0 },
commit e8e585651215b011e3ad07c59d0eab9107ccd8c6
Author: Dave Airlie <[EMAIL PROTECTED]>
Date: Wed Jan 2 10:14:46 2008 +1000
PLL/r600: tweak pll to pick first one found instead of keeping going
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index 2f9034a..c3a47b9 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -173,6 +173,8 @@ RADEONComputePLL(RADEONPLLPtr pll,
best_vco_diff = vco_diff;
}
}
+ if (best_freq == freq)
+ break;
}
ErrorF("best_freq: %u\n", (unsigned int)best_freq);
commit 14aa4060ad27ecb3d40b2b17ee4cf7cc55a121dd
Author: Dave Airlie <[EMAIL PROTECTED]>
Date: Wed Jan 2 09:49:44 2008 +1000
r600: fix tv-out output naming
diff --git a/src/radeon_output.c b/src/radeon_output.c
index 9efa056..847e69a 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -1182,6 +1182,7 @@ void RADEONSetOutputType(ScrnInfoPtr pScrn,
RADEONOutputPrivatePtr radeon_output
output = OUTPUT_DVI_D; break;
case CONNECTOR_DVI_A:
output = OUTPUT_DVI_A; break;
+ case CONNECTOR_DIN:
case CONNECTOR_STV:
output = OUTPUT_STV; break;
case CONNECTOR_CTV:
--
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