Makefile.am | 11
README.ati | 828 -------
README.ati.sgml | 648 -----
README.r128 | 160 -
README.r128.sgml | 138 -
configure.ac | 66
man/Makefile.am | 4
man/r128.man | 156 -
man/radeon.man | 26
src/AtomBios/includes/ObjectID.h | 36
src/AtomBios/includes/atombios.h | 254 +-
src/Makefile.am | 89
src/ati.c | 361 ---
src/ati.h | 4
src/ati_pciids_gen.h | 6
src/atiadjust.c | 134 -
src/atiadjust.h | 31
src/atiaudio.c | 50
src/atiaudio.h | 51
src/atibank.c | 114
src/atibank.h | 44
src/atibus.c | 123 -
src/atibus.h | 49
src/atichip.c | 271 --
src/atichip.h | 94
src/aticlock.c | 442 ---
src/aticlock.h | 62
src/aticonfig.c | 527 ----
src/aticonsole.c | 816 ------
src/aticonsole.h | 43
src/aticrtc.h | 42
src/aticursor.h | 42
src/atidac.c | 462 ---
src/atidac.h | 99
src/atidecoder.c | 50
src/atidecoder.h | 51
src/atidga.c | 483 ----
src/atidga.h | 36
src/atidri.c | 1640 -------------
src/atidri.h | 49
src/atidripriv.h | 57
src/atidsp.c | 302 --
src/atidsp.h | 35
src/atii2c.c | 399 ---
src/atii2c.h | 48
src/atiload.c | 98
src/atiload.h | 32
src/atilock.c | 537 ----
src/atilock.h | 31
src/atimach64.c | 1341 -----------
src/atimach64.h | 36
src/atimach64accel.c | 1068 ---------
src/atimach64accel.h | 42
src/atimach64cursor.c | 426 ---
src/atimach64exa.c | 696 -----
src/atimach64i2c.c | 469 ---
src/atimach64i2c.h | 32
src/atimach64io.c | 103
src/atimach64io.h | 421 ---
src/atimach64probe.c | 234 -
src/atimach64probe.h | 32
src/atimach64render.c | 898 -------
src/atimach64version.h | 59
src/atimach64xv.c | 1686 --------------
src/atimisc.c | 82
src/atimode.c | 1084 ---------
src/atimode.h | 35
src/atimodule.c | 6
src/atioption.h | 98
src/atipciids.h | 7
src/atipcirename.h | 3
src/atipreinit.c | 2464 --------------------
src/atipreinit.h | 30
src/atiprint.c | 784 ------
src/atiprint.h | 34
src/atipriv.h | 30
src/atiprobe.c | 521 ----
src/atiprobe.h | 30
src/atiregs.h | 2882 ------------------------
src/atirgb514.c | 283 --
src/atirgb514.h | 35
src/atiscreen.c | 692 -----
src/atiscreen.h | 31
src/atistruct.h | 529 ----
src/atituner.c | 177 -
src/atituner.h | 69
src/atiutil.c | 117
src/atiutil.h | 67
src/ativalid.c | 161 -
src/ativalid.h | 30
src/ativga.c | 195 -
src/ativga.h | 40
src/ativgaio.c | 49
src/ativgaio.h | 56
src/atividmem.c | 483 ----
src/atividmem.h | 73
src/atiwonder.c | 159 -
src/atiwonder.h | 38
src/atiwonderio.c | 66
src/atiwonderio.h | 46
src/atixv.h | 34
src/atombios_output.c | 120 -
src/legacy_crtc.c | 28
src/legacy_output.c | 92
src/mach64_common.h | 130 -
src/mach64_dri.h | 125 -
src/mach64_sarea.h | 162 -
src/pcidb/ati_pciids.csv | 6
src/pcidb/parse_pci_ids.pl | 8
src/r128.h | 606 -----
src/r128_accel.c | 1880 ----------------
src/r128_chipset.h | 54
src/r128_common.h | 169 -
src/r128_cursor.c | 311 --
src/r128_dga.c | 402 ---
src/r128_dri.c | 1499 ------------
src/r128_dri.h | 100
src/r128_dripriv.h | 57
src/r128_driver.c | 4465 --------------------------------------
src/r128_misc.c | 83
src/r128_probe.c | 266 --
src/r128_probe.h | 73
src/r128_reg.h | 1533 -------------
src/r128_sarea.h | 194 -
src/r128_version.h | 59
src/r128_video.c | 1028 --------
src/radeon.h | 24
src/radeon_accel.c | 8
src/radeon_atombios.c | 67
src/radeon_chipinfo_gen.h | 6
src/radeon_chipset_gen.h | 6
src/radeon_commonfuncs.c | 295 +-
src/radeon_crtc.c | 35
src/radeon_driver.c | 395 ++-
src/radeon_exa.c | 17
src/radeon_exa_funcs.c | 13
src/radeon_exa_render.c | 622 ++++-
src/radeon_misc.c | 6
src/radeon_output.c | 449 +++
src/radeon_pci_chipset_gen.h | 6
src/radeon_pci_device_match_gen.h | 280 ++
src/radeon_probe.c | 215 -
src/radeon_probe.h | 54
src/radeon_reg.h | 1035 ++++++++
src/radeon_textured_video.c | 383 +++
src/radeon_textured_videofuncs.c | 718 ++++++
src/radeon_video.c | 201 +
src/radeon_video.h | 44
148 files changed, 4781 insertions(+), 42742 deletions(-)
New commits:
commit 1f6a23000001f3d1c21b5c04f94714a8caa7aa8b
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Sat Mar 1 15:53:42 2008 -0500
RADEON: only restore legacy dac regs on legacy radeons
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index fccdbb4..6a168a5 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -4644,7 +4644,9 @@ void RADEONRestore(ScrnInfoPtr pScrn)
*/
if (IS_AVIVO_VARIANT)
avivo_restore_vga_regs(pScrn, restore);
- RADEONRestoreDACRegisters(pScrn, restore);
+
+ if (!IS_AVIVO_VARIANT)
+ RADEONRestoreDACRegisters(pScrn, restore);
#if 0
RADEONWaitForVerticalSync(pScrn);
commit dee6cef8e62d0651c00319e03eea92940fd24aa4
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Sat Mar 1 14:39:32 2008 -0500
RS4xx: enable exa render accel and textured video
RS6xx paths seem to work fine on RS4xx
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
index 3d15882..8a58df2 100644
--- a/src/radeon_exa_funcs.c
+++ b/src/radeon_exa_funcs.c
@@ -533,10 +533,9 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
#ifdef RENDER
if (info->RenderAccel) {
- if ((info->ChipFamily >= CHIP_FAMILY_R600) ||
- (info->ChipFamily == CHIP_FAMILY_RS400))
+ if (info->ChipFamily >= CHIP_FAMILY_R600)
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Render acceleration "
- "unsupported on XPRESS, R500 and newer
cards.\n");
+ "unsupported on R600 and newer cards.\n");
else if (IS_R300_VARIANT || (IS_AVIVO_VARIANT && info->ChipFamily <=
CHIP_FAMILY_RS690)) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Render acceleration "
"enabled for R300 type cards.\n");
diff --git a/src/radeon_video.c b/src/radeon_video.c
index 3cbd8f6..555186a 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -285,14 +285,12 @@ void RADEONInitVideo(ScreenPtr pScreen)
RADEONInitOffscreenImages(pScreen);
}
- if (info->ChipFamily != CHIP_FAMILY_RS400) {
- texturedAdaptor = RADEONSetupImageTexturedVideo(pScreen);
- if (texturedAdaptor != NULL) {
- adaptors[num_adaptors++] = texturedAdaptor;
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Set up textured video\n");
- } else
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Failed to set up textured
video\n");
- }
+ texturedAdaptor = RADEONSetupImageTexturedVideo(pScreen);
+ if (texturedAdaptor != NULL) {
+ adaptors[num_adaptors++] = texturedAdaptor;
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Set up textured video\n");
+ } else
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Failed to set up textured
video\n");
if(num_adaptors)
xf86XVScreenInit(pScreen, adaptors, num_adaptors);
commit 129f737efe4e8d1a368e7db4b063bdcd9339cb09
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Sat Mar 1 14:32:30 2008 -0500
AVIVO: save/restore regs by block
Save/Restore the entire block for each output.
This should fix VT switch problems.
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 1b3e800..fccdbb4 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -4158,41 +4158,50 @@ avivo_save(ScrnInfoPtr pScrn, RADEONSavePtr save)
state->grph2.viewport_start = INREG(AVIVO_D2MODE_VIEWPORT_START);
state->grph2.viewport_size = INREG(AVIVO_D2MODE_VIEWPORT_SIZE);
- state->daca.enable = INREG(AVIVO_DACA_ENABLE);
- state->daca.source_select = INREG(AVIVO_DACA_SOURCE_SELECT);
- state->daca.force_output_cntl = INREG(AVIVO_DACA_FORCE_OUTPUT_CNTL);
- state->daca.powerdown = INREG(AVIVO_DACA_POWERDOWN);
-
- state->dacb.enable = INREG(AVIVO_DACB_ENABLE);
- state->dacb.source_select = INREG(AVIVO_DACB_SOURCE_SELECT);
- state->dacb.force_output_cntl = INREG(AVIVO_DACB_FORCE_OUTPUT_CNTL);
- state->dacb.powerdown = INREG(AVIVO_DACB_POWERDOWN);
-
- state->tmds1.cntl = INREG(AVIVO_TMDSA_CNTL);
- state->tmds1.source_select = INREG(AVIVO_TMDSA_SOURCE_SELECT);
- state->tmds1.bit_depth_cntl = INREG(AVIVO_TMDSA_BIT_DEPTH_CONTROL);
- state->tmds1.data_sync = INREG(AVIVO_TMDSA_DATA_SYNCHRONIZATION);
- state->tmds1.transmitter_enable = INREG(AVIVO_TMDSA_TRANSMITTER_ENABLE);
- state->tmds1.transmitter_cntl = INREG(AVIVO_TMDSA_TRANSMITTER_CONTROL);
-
- state->tmds2.cntl = INREG(AVIVO_LVTMA_CNTL);
- state->tmds2.source_select = INREG(AVIVO_LVTMA_SOURCE_SELECT);
- state->tmds2.bit_depth_cntl = INREG(AVIVO_LVTMA_BIT_DEPTH_CONTROL);
- state->tmds2.data_sync = INREG(AVIVO_LVTMA_DATA_SYNCHRONIZATION);
+ j = 0;
+ /* save DVOA regs */
+ for (i = 0x7980; i <= 0x79bc; i += 4) {
+ state->dvoa[j] = INREG(i);
+ j++;
+ }
- if (info->ChipFamily >= CHIP_FAMILY_R600) {
- state->tmds2.transmitter_enable = INREG(R600_LVTMA_TRANSMITTER_ENABLE);
- state->tmds2.transmitter_cntl = INREG(R600_LVTMA_TRANSMITTER_CONTROL);
- state->lvtma_pwrseq_cntl = INREG(R600_LVTMA_PWRSEQ_CNTL);
- state->lvtma_pwrseq_state = INREG(R600_LVTMA_PWRSEQ_STATE);
- } else {
- state->tmds2.transmitter_enable = INREG(R500_LVTMA_TRANSMITTER_ENABLE);
- state->tmds2.transmitter_cntl = INREG(R500_LVTMA_TRANSMITTER_CONTROL);
- state->lvtma_pwrseq_cntl = INREG(R500_LVTMA_PWRSEQ_CNTL);
- state->lvtma_pwrseq_state = INREG(R500_LVTMA_PWRSEQ_STATE);
+ j = 0;
+ /* save DAC regs */
+ for (i = 0x7800; i <= 0x782c; i += 4) {
+ state->daca[j] = INREG(i);
+ state->dacb[j] = INREG(i + 0x200);
+ j++;
+ }
+ for (i = 0x7834; i <= 0x7840; i += 4) {
+ state->daca[j] = INREG(i);
+ state->dacb[j] = INREG(i + 0x200);
+ j++;
+ }
+ for (i = 0x7850; i <= 0x7868; i += 4) {
+ state->daca[j] = INREG(i);
+ state->dacb[j] = INREG(i + 0x200);
+ j++;
}
- if (info->IsIGP) {
+ j = 0;
+ /* save TMDSA regs */
+ for (i = 0x7880; i <= 0x78e0; i += 4) {
+ state->tmdsa[j] = INREG(i);
+ j++;
+ }
+ for (i = 0x7904; i <= 0x7918; i += 4) {
+ state->tmdsa[j] = INREG(i);
+ j++;
+ }
+
+ j = 0;
+ /* save LVTMA regs */
+ for (i = 0x7a80; i <= 0x7b18; i += 4) {
+ state->lvtma[j] = INREG(i);
+ j++;
+ }
+
+ if (info->ChipFamily == CHIP_FAMILY_RS690) {
j = 0;
/* save DDIA regs */
for (i = 0x7200; i <= 0x7290; i += 4) {
@@ -4339,42 +4348,52 @@ avivo_restore(ScrnInfoPtr pScrn, RADEONSavePtr restore)
OUTREG(AVIVO_D2MODE_VIEWPORT_START, state->grph2.viewport_start);
OUTREG(AVIVO_D2MODE_VIEWPORT_SIZE, state->grph2.viewport_size);
- OUTREG(AVIVO_DACA_ENABLE, state->daca.enable);
- OUTREG(AVIVO_DACA_SOURCE_SELECT, state->daca.source_select);
- OUTREG(AVIVO_DACA_FORCE_OUTPUT_CNTL, state->daca.force_output_cntl);
- OUTREG(AVIVO_DACA_POWERDOWN, state->daca.powerdown);
-
- OUTREG(AVIVO_TMDSA_CNTL, state->tmds1.cntl);
- OUTREG(AVIVO_TMDSA_BIT_DEPTH_CONTROL, state->tmds1.bit_depth_cntl);
- OUTREG(AVIVO_TMDSA_DATA_SYNCHRONIZATION, state->tmds1.data_sync);
- OUTREG(AVIVO_TMDSA_TRANSMITTER_ENABLE, state->tmds1.transmitter_enable);
- OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, state->tmds1.transmitter_cntl);
- OUTREG(AVIVO_TMDSA_SOURCE_SELECT, state->tmds1.source_select);
+ j = 0;
+ /* DVOA regs */
+ for (i = 0x7980; i <= 0x79bc; i += 4) {
+ OUTREG(i, state->dvoa[j]);
+ j++;
+ }
- OUTREG(AVIVO_DACB_ENABLE, state->dacb.enable);
- OUTREG(AVIVO_DACB_SOURCE_SELECT, state->dacb.source_select);
- OUTREG(AVIVO_DACB_FORCE_OUTPUT_CNTL, state->dacb.force_output_cntl);
- OUTREG(AVIVO_DACB_POWERDOWN, state->dacb.powerdown);
+ j = 0;
+ /* DAC regs */
+ for (i = 0x7800; i <= 0x782c; i += 4) {
+ OUTREG(i, state->daca[j]);
+ OUTREG((i + 0x200), state->dacb[j]);
+ j++;
+ }
+ for (i = 0x7834; i <= 0x7840; i += 4) {
+ OUTREG(i, state->daca[j]);
+ OUTREG((i + 0x200), state->dacb[j]);
+ j++;
+ }
+ for (i = 0x7850; i <= 0x7868; i += 4) {
+ OUTREG(i, state->daca[j]);
+ OUTREG((i + 0x200), state->dacb[j]);
+ j++;
+ }
- OUTREG(AVIVO_LVTMA_CNTL, state->tmds2.cntl);
- OUTREG(AVIVO_LVTMA_BIT_DEPTH_CONTROL, state->tmds2.bit_depth_cntl);
- OUTREG(AVIVO_LVTMA_DATA_SYNCHRONIZATION, state->tmds2.data_sync);
- OUTREG(AVIVO_LVTMA_SOURCE_SELECT, state->tmds2.source_select);
+ j = 0;
+ /* TMDSA regs */
+ for (i = 0x7880; i <= 0x78e0; i += 4) {
+ OUTREG(i, state->tmdsa[j]);
+ j++;
+ }
+ for (i = 0x7904; i <= 0x7918; i += 4) {
+ OUTREG(i, state->tmdsa[j]);
+ j++;
+ }
- if (info->ChipFamily >= CHIP_FAMILY_R600) {
- OUTREG(R600_LVTMA_TRANSMITTER_ENABLE, state->tmds2.transmitter_enable);
- OUTREG(R600_LVTMA_TRANSMITTER_CONTROL, state->tmds2.transmitter_cntl);
- OUTREG(R600_LVTMA_PWRSEQ_CNTL, state->lvtma_pwrseq_cntl);
- OUTREG(R600_LVTMA_PWRSEQ_STATE, state->lvtma_pwrseq_state);
- } else {
- OUTREG(R500_LVTMA_TRANSMITTER_ENABLE, state->tmds2.transmitter_enable);
- OUTREG(R500_LVTMA_TRANSMITTER_CONTROL, state->tmds2.transmitter_cntl);
- OUTREG(R500_LVTMA_PWRSEQ_CNTL, state->lvtma_pwrseq_cntl);
- OUTREG(R500_LVTMA_PWRSEQ_STATE, state->lvtma_pwrseq_state);
+ j = 0;
+ /* LVTMA regs */
+ for (i = 0x7a80; i <= 0x7b18; i += 4) {
+ OUTREG(i, state->lvtma[j]);
+ j++;
}
- if (info->IsIGP) {
- int i, j = 0;
+ /* DDIA regs */
+ if (info->ChipFamily == CHIP_FAMILY_RS690) {
+ j = 0;
for (i = 0x7200; i <= 0x7290; i += 4) {
OUTREG(i, state->ddia[j]);
j++;
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index 909a5da..c399cc2 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -312,22 +312,6 @@ struct avivo_grph_state {
CARD32 viewport_size;
};
-struct avivo_dac_state {
- CARD32 enable;
- CARD32 source_select;
- CARD32 force_output_cntl;
- CARD32 powerdown;
-};
-
-struct avivo_dig_state {
- CARD32 cntl;
- CARD32 bit_depth_cntl;
- CARD32 data_sync;
- CARD32 transmitter_enable;
- CARD32 transmitter_cntl;
- CARD32 source_select;
-};
-
struct avivo_state
{
CARD32 hdp_fb_location;
@@ -341,9 +325,6 @@ struct avivo_state
CARD32 crtc_master_en;
CARD32 crtc_tv_control;
- CARD32 lvtma_pwrseq_cntl;
- CARD32 lvtma_pwrseq_state;
-
struct avivo_pll_state pll1;
struct avivo_pll_state pll2;
@@ -353,12 +334,6 @@ struct avivo_state
struct avivo_grph_state grph1;
struct avivo_grph_state grph2;
- struct avivo_dac_state daca;
- struct avivo_dac_state dacb;
-
- struct avivo_dig_state tmds1;
- struct avivo_dig_state tmds2;
-
/* DDIA block on RS6xx chips */
CARD32 ddia[37];
@@ -367,6 +342,19 @@ struct avivo_state
CARD32 d2scl[40];
CARD32 dxscl[6+2];
+ /* dac regs */
+ CARD32 daca[23];
+ CARD32 dacb[23];
+
+ /* tmdsa */
+ CARD32 tmdsa[31];
+
+ /* lvtma */
+ CARD32 lvtma[39];
+
+ /* dvoa */
+ CARD32 dvoa[16];
+
};
/*
commit b069aadaa63a95d7a71b5cfbab83577b49501094
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Fri Feb 29 22:36:02 2008 -0500
AVIVO: LVDS panels need dithering enabled
Fixes bug 14760
diff --git a/src/atombios_output.c b/src/atombios_output.c
index 3b49cde..fb3cb3e 100644
--- a/src/atombios_output.c
+++ b/src/atombios_output.c
@@ -385,7 +385,6 @@ atombios_output_scaler_setup(xf86OutputPtr output,
DisplayModePtr mode)
static void
dfp_disable_dither(xf86OutputPtr output, int device)
{
- RADEONOutputPrivatePtr radeon_output = output->driver_private;
RADEONInfoPtr info = RADEONPTR(output->scrn);
unsigned char *RADEONMMIO = info->MMIO;
@@ -399,7 +398,7 @@ dfp_disable_dither(xf86OutputPtr output, int device)
else
OUTREG(AVIVO_DVOA_BIT_DEPTH_CONTROL, 0); /* DVO */
break;
- case ATOM_DEVICE_LCD1_SUPPORT:
+ /*case ATOM_DEVICE_LCD1_SUPPORT:*/ /* LVDS panels need dither enabled */
case ATOM_DEVICE_DFP3_SUPPORT:
OUTREG(AVIVO_LVTMA_BIT_DEPTH_CONTROL, 0); /* LVTMA */
break;
commit fe87bdee815372b4b4d7d4c705e34681625b90f2
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Fri Feb 29 13:10:13 2008 -0500
AVIVO: disable pageflipping on avivo chips until we have proper drm support
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index c38e39b..1b3e800 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -2163,7 +2163,14 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
} else {
from = xf86GetOptValBool(info->Options, OPTION_PAGE_FLIP,
&info->allowPageFlip) ? X_CONFIG : X_DEFAULT;
- reason = "";
+
+ if (IS_AVIVO_VARIANT) {
+ info->allowPageFlip = 0;
+ reason = " on r5xx and newer chips.\n";
+ } else {
+ reason = "";
+ }
+
}
#else
from = X_DEFAULT;
commit fb3678c7f511d539a51cd090cb8b5041d7d2ba26
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Fri Feb 29 13:01:21 2008 -0500
R5xx: fix register count when sending fragment program for textured video
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index a0bb828..9a5187b 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -378,7 +378,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn,
RADEONPortPrivPtr pPriv
R300_ALU_ALPHA_OMOD(R300_ALU_ALPHA_OMOD_NONE)));
FINISH_VIDEO();
} else {
- BEGIN_VIDEO(22);
+ BEGIN_VIDEO(23);
OUT_VIDEO_REG(R300_RS_COUNT,
((2 << R300_RS_COUNT_IT_COUNT_SHIFT) |
R300_RS_COUNT_HIRES_EN));
commit a66d37d1a896ec934989592457c2beff8e6f1639
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Fri Feb 29 04:07:05 2008 -0500
fix off-by-one in last commit
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index 21e3439..909a5da 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -363,8 +363,8 @@ struct avivo_state
CARD32 ddia[37];
/* scalers */
- CARD32 d1scl[39];
- CARD32 d2scl[39];
+ CARD32 d1scl[40];
+ CARD32 d2scl[40];
CARD32 dxscl[6+2];
};
commit e56062960be0c8d3947861dd5e0691fce6516b99
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Thu Feb 28 19:16:39 2008 -0500
AVIVO: save/restore scaler regs
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 10b0b8c..c38e39b 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -4045,6 +4045,7 @@ avivo_save(ScrnInfoPtr pScrn, RADEONSavePtr save)
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
struct avivo_state *state = &save->avivo;
+ int i, j;
// state->vga_memory_base = INREG(AVIVO_VGA_MEMORY_BASE);
// state->vga_fb_start = INREG(AVIVO_VGA_FB_START);
@@ -4110,8 +4111,6 @@ avivo_save(ScrnInfoPtr pScrn, RADEONSavePtr save)
state->grph1.viewport_start = INREG(AVIVO_D1MODE_VIEWPORT_START);
state->grph1.viewport_size = INREG(AVIVO_D1MODE_VIEWPORT_SIZE);
- state->grph1.scl_enable = INREG(AVIVO_D1SCL_SCALER_ENABLE);
- state->grph1.scl_tap_control = INREG(AVIVO_D1SCL_SCALER_TAP_CONTROL);
state->crtc2.pll_source = INREG(AVIVO_PCLK_CRTC2_CNTL);
@@ -4151,8 +4150,6 @@ avivo_save(ScrnInfoPtr pScrn, RADEONSavePtr save)
state->grph2.viewport_start = INREG(AVIVO_D2MODE_VIEWPORT_START);
state->grph2.viewport_size = INREG(AVIVO_D2MODE_VIEWPORT_SIZE);
- state->grph2.scl_enable = INREG(AVIVO_D2SCL_SCALER_ENABLE);
- state->grph2.scl_tap_control = INREG(AVIVO_D2SCL_SCALER_TAP_CONTROL);
state->daca.enable = INREG(AVIVO_DACA_ENABLE);
state->daca.source_select = INREG(AVIVO_DACA_SOURCE_SELECT);
@@ -4189,7 +4186,7 @@ avivo_save(ScrnInfoPtr pScrn, RADEONSavePtr save)
}
if (info->IsIGP) {
- int i, j = 0;
+ j = 0;
/* save DDIA regs */
for (i = 0x7200; i <= 0x7290; i += 4) {
state->ddia[j] = INREG(i);
@@ -4197,6 +4194,26 @@ avivo_save(ScrnInfoPtr pScrn, RADEONSavePtr save)
}
}
+ /* scalers */
+ j = 0;
+ for (i = 0x6578; i <= 0x65e4; i += 4) {
+ state->d1scl[j] = INREG(i);
+ state->d2scl[j] = INREG(i + 0x800);
+ j++;
+ }
+ for (i = 0x6600; i <= 0x662c; i += 4) {
+ state->d1scl[j] = INREG(i);
+ state->d2scl[j] = INREG(i + 0x800);
+ j++;
+ }
+ j = 0;
+ for (i = 0x66e8; i <= 0x66fc; i += 4) {
+ state->dxscl[j] = INREG(i);
+ j++;
+ }
+ state->dxscl[6] = INREG(0x6e30);
+ state->dxscl[7] = INREG(0x6e34);
+
if (state->crtc1.control & AVIVO_CRTC_EN)
info->crtc_on = TRUE;
@@ -4211,6 +4228,7 @@ avivo_restore(ScrnInfoPtr pScrn, RADEONSavePtr restore)
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
struct avivo_state *state = &restore->avivo;
+ int i, j;
// OUTMC(pScrn, AVIVO_MC_MEMORY_MAP, state->mc_memory_map);
// OUTREG(AVIVO_VGA_MEMORY_BASE, state->vga_memory_base);
@@ -4275,8 +4293,6 @@ avivo_restore(ScrnInfoPtr pScrn, RADEONSavePtr restore)
OUTREG(AVIVO_D1MODE_VIEWPORT_START, state->grph1.viewport_start);
OUTREG(AVIVO_D1MODE_VIEWPORT_SIZE, state->grph1.viewport_size);
- OUTREG(AVIVO_D1SCL_SCALER_ENABLE, state->grph1.scl_enable);
- OUTREG(AVIVO_D1SCL_SCALER_TAP_CONTROL, state->grph1.scl_tap_control);
OUTREG(AVIVO_PCLK_CRTC2_CNTL, state->crtc2.pll_source);
@@ -4315,8 +4331,6 @@ avivo_restore(ScrnInfoPtr pScrn, RADEONSavePtr restore)
OUTREG(AVIVO_D2MODE_VIEWPORT_START, state->grph2.viewport_start);
OUTREG(AVIVO_D2MODE_VIEWPORT_SIZE, state->grph2.viewport_size);
- OUTREG(AVIVO_D2SCL_SCALER_ENABLE, state->grph2.scl_enable);
- OUTREG(AVIVO_D2SCL_SCALER_TAP_CONTROL, state->grph2.scl_tap_control);
OUTREG(AVIVO_DACA_ENABLE, state->daca.enable);
OUTREG(AVIVO_DACA_SOURCE_SELECT, state->daca.source_select);
@@ -4341,15 +4355,15 @@ avivo_restore(ScrnInfoPtr pScrn, RADEONSavePtr restore)
OUTREG(AVIVO_LVTMA_SOURCE_SELECT, state->tmds2.source_select);
if (info->ChipFamily >= CHIP_FAMILY_R600) {
- OUTREG(R600_LVTMA_TRANSMITTER_ENABLE, state->tmds2.transmitter_enable);
- OUTREG(R600_LVTMA_TRANSMITTER_CONTROL, state->tmds2.transmitter_cntl);
- OUTREG(R600_LVTMA_PWRSEQ_CNTL, state->lvtma_pwrseq_cntl);
- OUTREG(R600_LVTMA_PWRSEQ_STATE, state->lvtma_pwrseq_state);
+ OUTREG(R600_LVTMA_TRANSMITTER_ENABLE, state->tmds2.transmitter_enable);
+ OUTREG(R600_LVTMA_TRANSMITTER_CONTROL, state->tmds2.transmitter_cntl);
+ OUTREG(R600_LVTMA_PWRSEQ_CNTL, state->lvtma_pwrseq_cntl);
+ OUTREG(R600_LVTMA_PWRSEQ_STATE, state->lvtma_pwrseq_state);
} else {
- OUTREG(R500_LVTMA_TRANSMITTER_ENABLE, state->tmds2.transmitter_enable);
- OUTREG(R500_LVTMA_TRANSMITTER_CONTROL, state->tmds2.transmitter_cntl);
- OUTREG(R500_LVTMA_PWRSEQ_CNTL, state->lvtma_pwrseq_cntl);
- OUTREG(R500_LVTMA_PWRSEQ_STATE, state->lvtma_pwrseq_state);
+ OUTREG(R500_LVTMA_TRANSMITTER_ENABLE, state->tmds2.transmitter_enable);
+ OUTREG(R500_LVTMA_TRANSMITTER_CONTROL, state->tmds2.transmitter_cntl);
+ OUTREG(R500_LVTMA_PWRSEQ_CNTL, state->lvtma_pwrseq_cntl);
+ OUTREG(R500_LVTMA_PWRSEQ_STATE, state->lvtma_pwrseq_state);
}
if (info->IsIGP) {
@@ -4360,6 +4374,26 @@ avivo_restore(ScrnInfoPtr pScrn, RADEONSavePtr restore)
}
}
+ /* scalers */
+ j = 0;
+ for (i = 0x6578; i <= 0x65e4; i += 4) {
+ OUTREG(i, state->d1scl[j]);
+ OUTREG((i + 0x800), state->d2scl[j]);
+ j++;
+ }
+ for (i = 0x6600; i <= 0x662c; i += 4) {
+ OUTREG(i, state->d1scl[j]);
+ OUTREG((i + 0x800), state->d2scl[j]);
+ j++;
+ }
+ j = 0;
+ for (i = 0x66e8; i <= 0x66fc; i += 4) {
+ OUTREG(i, state->dxscl[j]);
+ j++;
+ }
+ OUTREG(0x6e30, state->dxscl[6]);
+ OUTREG(0x6e34, state->dxscl[7]);
+
OUTREG(AVIVO_D1VGA_CONTROL, state->vga1_cntl);
OUTREG(AVIVO_D2VGA_CONTROL, state->vga2_cntl);
}
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index 82bb153..21e3439 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -310,8 +310,6 @@ struct avivo_grph_state {
CARD32 viewport_start;
CARD32 viewport_size;
- CARD32 scl_enable;
- CARD32 scl_tap_control;
};
struct avivo_dac_state {
@@ -363,6 +361,12 @@ struct avivo_state
/* DDIA block on RS6xx chips */
CARD32 ddia[37];
+
+ /* scalers */
+ CARD32 d1scl[39];
+ CARD32 d2scl[39];
+ CARD32 dxscl[6+2];
+
};
/*
commit ae1c39a9b3e666404d0931679c9078c2e125a8bc
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Thu Feb 28 18:53:55 2008 -0500
RS6xx: rework output parsing
Turns out it's not as complex as I originially thought.
IGP chips just have non-standard GPIO entires for DDC.
diff --git a/src/radeon_atombios.c b/src/radeon_atombios.c
index 88c220b..351939e 100644
--- a/src/radeon_atombios.c
+++ b/src/radeon_atombios.c
@@ -1745,12 +1745,7 @@ RADEONGetATOMConnectorInfoFromBIOSConnectorTable
(ScrnInfoPtr pScrn)
info->BiosConnector[i].valid = TRUE;
info->BiosConnector[i].output_id = ci.sucI2cId.sbfAccess.bfI2C_LineMux;
- if (info->IsIGP && (i == ATOM_DEVICE_DFP2_INDEX))
- info->BiosConnector[i].devices = (1 << ATOM_DEVICE_DFP3_INDEX);
- else if (info->IsIGP && (i == ATOM_DEVICE_DFP3_INDEX))
- info->BiosConnector[i].devices = (1 << ATOM_DEVICE_DFP2_INDEX);
- else
- info->BiosConnector[i].devices = (1 << i);
+ info->BiosConnector[i].devices = (1 << i);
info->BiosConnector[i].ConnectorType =
ci.sucConnectorInfo.sbfAccess.bfConnectorType;
info->BiosConnector[i].DACType =
ci.sucConnectorInfo.sbfAccess.bfAssociatedDAC;
@@ -1759,14 +1754,14 @@ RADEONGetATOMConnectorInfoFromBIOSConnectorTable
(ScrnInfoPtr pScrn)
(i == ATOM_DEVICE_TV2_INDEX) ||
(i == ATOM_DEVICE_CV_INDEX))
info->BiosConnector[i].ddc_i2c.valid = FALSE;
- else if ((i == ATOM_DEVICE_DFP3_INDEX) && info->IsIGP) {
- /* DDIA port uses non-standard gpio entry */
- if (info->BiosConnector[ATOM_DEVICE_DFP2_INDEX].valid)
+ else if (info->IsIGP) {
+ /* IGP DFP ports use non-standard gpio entries */
+ if ((i == ATOM_DEVICE_DFP2_INDEX) || (i == ATOM_DEVICE_DFP3_INDEX))
info->BiosConnector[i].ddc_i2c =
- RADEONLookupGPIOLineForDDC(pScrn,
ci.sucI2cId.sbfAccess.bfI2C_LineMux + 2);
+ RADEONLookupGPIOLineForDDC(pScrn,
ci.sucI2cId.sbfAccess.bfI2C_LineMux + 1);
else
info->BiosConnector[i].ddc_i2c =
- RADEONLookupGPIOLineForDDC(pScrn,
ci.sucI2cId.sbfAccess.bfI2C_LineMux + 1);
+ RADEONLookupGPIOLineForDDC(pScrn,
ci.sucI2cId.sbfAccess.bfI2C_LineMux);
} else
info->BiosConnector[i].ddc_i2c =
RADEONLookupGPIOLineForDDC(pScrn,
ci.sucI2cId.sbfAccess.bfI2C_LineMux);
@@ -1775,15 +1770,12 @@ RADEONGetATOMConnectorInfoFromBIOSConnectorTable
(ScrnInfoPtr pScrn)
info->BiosConnector[i].TMDSType = TMDS_INT;
else if (i == ATOM_DEVICE_DFP2_INDEX) {
if (info->IsIGP)
- info->BiosConnector[i].TMDSType = TMDS_LVTMA;
- else
- info->BiosConnector[i].TMDSType = TMDS_EXT;
- } else if (i == ATOM_DEVICE_DFP3_INDEX) {
- if (info->IsIGP)
info->BiosConnector[i].TMDSType = TMDS_DDIA;
else
- info->BiosConnector[i].TMDSType = TMDS_LVTMA;
- } else
+ info->BiosConnector[i].TMDSType = TMDS_EXT;
+ } else if (i == ATOM_DEVICE_DFP3_INDEX)
+ info->BiosConnector[i].TMDSType = TMDS_LVTMA;
+ else
info->BiosConnector[i].TMDSType = TMDS_NONE;
/* Always set the connector type to VGA for CRT1/CRT2. if they are
commit d8d6c9fe4ae7e1ab67dd041a251e901d97c29ed6
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Thu Feb 28 17:01:14 2008 -0500
RS6xx: fix typos in previous commit
Noted by Maciej Cencora on IRC
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index e9c24af..10b0b8c 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -4354,7 +4354,7 @@ avivo_restore(ScrnInfoPtr pScrn, RADEONSavePtr restore)
if (info->IsIGP) {
int i, j = 0;
- for (i = 0x7200; i <= 0x7290; i =+ 4) {
+ for (i = 0x7200; i <= 0x7290; i += 4) {
OUTREG(i, state->ddia[j]);
j++;
}
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index d11f3d9..82bb153 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -362,7 +362,7 @@ struct avivo_state
struct avivo_dig_state tmds2;
/* DDIA block on RS6xx chips */
- CARD32 ddia[36];
+ CARD32 ddia[37];
};
/*
commit 46547ae8bdbc5c10f1fd028b95ec4c5c31a5b318
Author: Alex Deucher <[EMAIL PROTECTED](none)>
Date: Thu Feb 28 14:29:30 2008 -0500
AVIVO: disable dithering on DFPs
This should fix the color banding some people have noticed.
Also save/restore DDIA regs on RS6xx
diff --git a/src/atombios_output.c b/src/atombios_output.c
index 07d212f..3b49cde 100644
--- a/src/atombios_output.c
+++ b/src/atombios_output.c
@@ -382,6 +382,33 @@ atombios_output_scaler_setup(xf86OutputPtr output,
DisplayModePtr mode)
}
+static void
+dfp_disable_dither(xf86OutputPtr output, int device)
+{
+ RADEONOutputPrivatePtr radeon_output = output->driver_private;
+ RADEONInfoPtr info = RADEONPTR(output->scrn);
+ unsigned char *RADEONMMIO = info->MMIO;
+
+ switch (device) {
+ case ATOM_DEVICE_DFP1_SUPPORT:
+ OUTREG(AVIVO_TMDSA_BIT_DEPTH_CONTROL, 0); /* TMDSA */
+ break;
+ case ATOM_DEVICE_DFP2_SUPPORT:
+ if (info->IsIGP)
+ OUTREG(AVIVO_DDIA_BIT_DEPTH_CONTROL, 0); /* DDIA */
+ else
+ OUTREG(AVIVO_DVOA_BIT_DEPTH_CONTROL, 0); /* DVO */
+ break;
+ case ATOM_DEVICE_LCD1_SUPPORT:
+ case ATOM_DEVICE_DFP3_SUPPORT:
+ OUTREG(AVIVO_LVTMA_BIT_DEPTH_CONTROL, 0); /* LVTMA */
+ break;
+ default:
+ break;
+ }
+
+}
+
static AtomBiosResult
atombios_display_device_control(atomBiosHandlePtr atomBIOS, int device, Bool
state)
{
@@ -579,19 +606,27 @@ atombios_output_mode_set(xf86OutputPtr output,
atombios_output_dac2_setup(output, adjusted_mode);
}
} else if (radeon_output->MonType == MT_DFP) {
- if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT)
- atombios_output_tmds1_setup(output, adjusted_mode);
- else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) {
- if (info->IsIGP)
- atombios_ddia_setup(output, adjusted_mode);
- else
- atombios_external_tmds_setup(output, adjusted_mode);
- } else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT)
- atombios_output_tmds2_setup(output, adjusted_mode);
+ if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) {
+ atombios_output_tmds1_setup(output, adjusted_mode);
+ dfp_disable_dither(output, ATOM_DEVICE_DFP1_SUPPORT);
+ } else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) {
+ if (info->IsIGP)
+ atombios_ddia_setup(output, adjusted_mode);
+ else
+ atombios_external_tmds_setup(output, adjusted_mode);
+ dfp_disable_dither(output, ATOM_DEVICE_DFP2_SUPPORT);
+ } else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) {
+ atombios_output_tmds2_setup(output, adjusted_mode);
+ dfp_disable_dither(output, ATOM_DEVICE_DFP3_SUPPORT);
+ }
} else if (radeon_output->MonType == MT_LCD) {
- if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT)
+ if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) {
atombios_output_lvds_setup(output, adjusted_mode);
- } else if (OUTPUT_IS_TV || (radeon_output->MonType == MT_CV)) {
+ dfp_disable_dither(output, ATOM_DEVICE_LCD1_SUPPORT);
+ }
+ } else if ((radeon_output->MonType == MT_CTV) ||
+ (radeon_output->MonType == MT_STV) ||
+ (radeon_output->MonType == MT_CV)) {
if (radeon_output->DACType == DAC_PRIMARY)
atombios_output_dac1_setup(output, adjusted_mode);
else if (radeon_output->DACType == DAC_TVDAC)
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 5cf8d51..e9c24af 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -4177,20 +4177,29 @@ avivo_save(ScrnInfoPtr pScrn, RADEONSavePtr save)
state->tmds2.data_sync = INREG(AVIVO_LVTMA_DATA_SYNCHRONIZATION);
if (info->ChipFamily >= CHIP_FAMILY_R600) {
- state->tmds2.transmitter_enable = INREG(R600_LVTMA_TRANSMITTER_ENABLE);
- state->tmds2.transmitter_cntl = INREG(R600_LVTMA_TRANSMITTER_CONTROL);
- state->lvtma_pwrseq_cntl = INREG(R600_LVTMA_PWRSEQ_CNTL);
- state->lvtma_pwrseq_state = INREG(R600_LVTMA_PWRSEQ_STATE);
+ state->tmds2.transmitter_enable = INREG(R600_LVTMA_TRANSMITTER_ENABLE);
+ state->tmds2.transmitter_cntl = INREG(R600_LVTMA_TRANSMITTER_CONTROL);
+ state->lvtma_pwrseq_cntl = INREG(R600_LVTMA_PWRSEQ_CNTL);
+ state->lvtma_pwrseq_state = INREG(R600_LVTMA_PWRSEQ_STATE);
} else {
- state->tmds2.transmitter_enable = INREG(R500_LVTMA_TRANSMITTER_ENABLE);
- state->tmds2.transmitter_cntl = INREG(R500_LVTMA_TRANSMITTER_CONTROL);
- state->lvtma_pwrseq_cntl = INREG(R500_LVTMA_PWRSEQ_CNTL);
- state->lvtma_pwrseq_state = INREG(R500_LVTMA_PWRSEQ_STATE);
+ state->tmds2.transmitter_enable = INREG(R500_LVTMA_TRANSMITTER_ENABLE);
+ state->tmds2.transmitter_cntl = INREG(R500_LVTMA_TRANSMITTER_CONTROL);
+ state->lvtma_pwrseq_cntl = INREG(R500_LVTMA_PWRSEQ_CNTL);
+ state->lvtma_pwrseq_state = INREG(R500_LVTMA_PWRSEQ_STATE);
+ }
+
+ if (info->IsIGP) {
+ int i, j = 0;
+ /* save DDIA regs */
+ for (i = 0x7200; i <= 0x7290; i += 4) {
+ state->ddia[j] = INREG(i);
+ j++;
+ }
}
if (state->crtc1.control & AVIVO_CRTC_EN)
info->crtc_on = TRUE;
-
+
if (state->crtc2.control & AVIVO_CRTC_EN)
info->crtc2_on = TRUE;
@@ -4343,12 +4352,20 @@ avivo_restore(ScrnInfoPtr pScrn, RADEONSavePtr restore)
OUTREG(R500_LVTMA_PWRSEQ_STATE, state->lvtma_pwrseq_state);
}
+ if (info->IsIGP) {
+ int i, j = 0;
+ for (i = 0x7200; i <= 0x7290; i =+ 4) {
+ OUTREG(i, state->ddia[j]);
+ j++;
+ }
+ }
+
OUTREG(AVIVO_D1VGA_CONTROL, state->vga1_cntl);
OUTREG(AVIVO_D2VGA_CONTROL, state->vga2_cntl);
}
void avivo_restore_vga_regs(ScrnInfoPtr pScrn, RADEONSavePtr restore)
-{
--
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