Joerg Sommer <[EMAIL PROTECTED]> writes: > Hi, > > inspired by John Steele (<[EMAIL PROTECTED]>, > <news:[EMAIL PROTECTED]>) I searched a little bit with google > and found that the instruction cache throttling register is named in the > Kernel source (include/asm-ppc/reg.h). A todo note is made in > arch/ppc/kernel/temp.c. > > I here next semester a lecture about kernel hacking. My idea is to > implements the instruction cache throttling register in this lecture. Are > there any plans to do this? Should there be a new node in > /sys/devices/system/cpu/cpu?/ to control the contents of the register? Is > there any similar at any other platform?
I don't think there should be a new node to control the register; it should be done through the cpufreq mechanism. You can get a start by reading the cpufreq documentation, and then comparing it against the cpufreq code we currently have. I'm interested to discuss this more. I have been wanting this feature for a while; and even have written some code for it a couple of times, but I tend to get distracted too easily when it comes to hobby code. cheers, John
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