gustavonihei commented on code in PR #6603:
URL: https://github.com/apache/incubator-nuttx/pull/6603#discussion_r919406362
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arch/xtensa/src/common/xtensa_schedsigaction.c:
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@@ -155,6 +156,9 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t
sigdeliver)
(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM |
PS_WOE | PS_CALLINC(1));
#endif
+#ifndef CONFIG_BUILD_FLAT
+ mpu_raiseprivilege(CURRENT_REGS);
Review Comment:
> low/raise cpu/dsp priority is normally done by core self
How about prefixing it with `up_` and declaring it on `include/nuttx/arch.h`?
Then, at architectural level, there could exist weak implementation of those
functions which, if needed, could be overriden by chip-specific ones (the case
for Espressif chips).
The RISC-V implementation manipulates the `STATUS_PPP` flag and could also
benefit from this abstraction.
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