xiaoxiang781216 commented on a change in pull request #5782:
URL: https://github.com/apache/incubator-nuttx/pull/5782#discussion_r835551809
##########
File path: arch/risc-v/include/syscall.h
##########
@@ -78,6 +79,7 @@
*/
#define SYS_switch_context (2)
+#endif /* CONFIG_ARCH_USE_S_MODE */
Review comment:
need move after line 91?
##########
File path: arch/risc-v/include/mode.h
##########
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * arch/risc-v/include/mode.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_INCLUDE_MODE_H
+#define __ARCH_RISCV_INCLUDE_MODE_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/csr.h>
Review comment:
should we include arch/irq.h?
##########
File path: arch/risc-v/src/common/supervisor/riscv_exception_macros.S
##########
@@ -0,0 +1,136 @@
+/****************************************************************************
+ * arch/risc-v/src/common/supervisor/riscv_exception_macros.S
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+.file "riscv_exception_macros.S"
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/irq.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_RV32
+# define REGLOAD lw
+# define REGSTORE sw
+#else
+# define REGLOAD ld
+# define REGSTORE sd
+#endif
+
+/****************************************************************************
+ * Name: save_ctx
+ *
+ * Parameter:
+ * in - Pointer to where the save is performed (e.g. sp)
+ *
+ * Description:
+ * Save the common context registers (i.e. work / temp / etc).
+ *
+ ****************************************************************************/
+
+.macro save_ctx in
+
+ REGSTORE x1, REG_X1(\in) /* ra */
+#ifdef RISCV_SAVE_GP
+ REGSTORE x3, REG_X3(\in) /* gp */
Review comment:
why not save and restore x2
##########
File path: arch/risc-v/src/common/supervisor/riscv_exception_macros.S
##########
@@ -0,0 +1,136 @@
+/****************************************************************************
+ * arch/risc-v/src/common/supervisor/riscv_exception_macros.S
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+.file "riscv_exception_macros.S"
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/irq.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_RV32
+# define REGLOAD lw
+# define REGSTORE sw
+#else
+# define REGLOAD ld
+# define REGSTORE sd
+#endif
+
+/****************************************************************************
+ * Name: save_ctx
+ *
+ * Parameter:
+ * in - Pointer to where the save is performed (e.g. sp)
+ *
+ * Description:
+ * Save the common context registers (i.e. work / temp / etc).
+ *
+ ****************************************************************************/
+
+.macro save_ctx in
+
+ REGSTORE x1, REG_X1(\in) /* ra */
+#ifdef RISCV_SAVE_GP
Review comment:
ditto
##########
File path: arch/risc-v/src/common/supervisor/riscv_exception_macros.S
##########
@@ -0,0 +1,136 @@
+/****************************************************************************
+ * arch/risc-v/src/common/supervisor/riscv_exception_macros.S
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+.file "riscv_exception_macros.S"
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/irq.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_RV32
+# define REGLOAD lw
+# define REGSTORE sw
+#else
+# define REGLOAD ld
+# define REGSTORE sd
+#endif
+
+/****************************************************************************
+ * Name: save_ctx
+ *
+ * Parameter:
+ * in - Pointer to where the save is performed (e.g. sp)
+ *
+ * Description:
+ * Save the common context registers (i.e. work / temp / etc).
+ *
+ ****************************************************************************/
+
+.macro save_ctx in
+
+ REGSTORE x1, REG_X1(\in) /* ra */
+#ifdef RISCV_SAVE_GP
+ REGSTORE x3, REG_X3(\in) /* gp */
+#endif
+ REGSTORE x4, REG_X4(\in) /* tp */
+ REGSTORE x5, REG_X5(\in) /* t0 */
+ REGSTORE x6, REG_X6(\in) /* t1 */
+ REGSTORE x7, REG_X7(\in) /* t2 */
+ REGSTORE x8, REG_X8(\in) /* s0 */
+ REGSTORE x9, REG_X9(\in) /* s1 */
+ REGSTORE x10, REG_X10(\in) /* a0 */
+ REGSTORE x11, REG_X11(\in) /* a1 */
+ REGSTORE x12, REG_X12(\in) /* a2 */
+ REGSTORE x13, REG_X13(\in) /* a3 */
+ REGSTORE x14, REG_X14(\in) /* a4 */
+ REGSTORE x15, REG_X15(\in) /* a5 */
+ REGSTORE x16, REG_X16(\in) /* a6 */
+ REGSTORE x17, REG_X17(\in) /* a7 */
+ REGSTORE x18, REG_X18(\in) /* s2 */
+ REGSTORE x19, REG_X19(\in) /* s3 */
+ REGSTORE x20, REG_X20(\in) /* s4 */
+ REGSTORE x21, REG_X21(\in) /* s5 */
+ REGSTORE x22, REG_X22(\in) /* s6 */
+ REGSTORE x23, REG_X23(\in) /* s7 */
+ REGSTORE x24, REG_X24(\in) /* s8 */
+ REGSTORE x25, REG_X25(\in) /* s9 */
+ REGSTORE x26, REG_X26(\in) /* s10 */
+ REGSTORE x27, REG_X27(\in) /* s11 */
+ REGSTORE x28, REG_X28(\in) /* t3 */
+ REGSTORE x29, REG_X29(\in) /* t4 */
+ REGSTORE x30, REG_X30(\in) /* t5 */
+ REGSTORE x31, REG_X31(\in) /* t6 */
+
+.endm
+
+/****************************************************************************
+ * Name: load_ctx
+ *
+ * Parameter:
+ * out - Pointer to where the load is performed (e.g. sp)
+ *
+ * Description:
+ * Load the common context registers (i.e. work / temp / etc).
+ *
+ ****************************************************************************/
+
+.macro load_ctx out
+
+ REGLOAD x1, REG_X1(\out) /* ra */
+#ifdef RISCV_SAVE_GP
Review comment:
where we define this macro?
##########
File path: arch/risc-v/include/syscall.h
##########
@@ -391,6 +396,64 @@ static inline uintptr_t sys_call6(unsigned int nbr,
uintptr_t parm1,
return r0;
}
+#ifdef CONFIG_ARCH_USE_S_MODE
+
+/* In S-mode the kernel cannot ecall to itself, because ecall will raise
+ * privileges to M-mode, which is not what we want. Instead, use the syscall
+ * trampoline to do the same.
+ */
+
+static inline uintptr_t ksys_call3(unsigned int nbr, uintptr_t parm1,
Review comment:
Since ksys_call is only used by up_xxx internally, it's better to move
it to internal header file(e.g. risc_internal.h or new file).
##########
File path: arch/risc-v/src/common/riscv_internal.h
##########
@@ -279,6 +288,63 @@ int riscv_pause_handler(int irq, void *c, void *arg);
uintptr_t riscv_mhartid(void);
+#ifdef CONFIG_ARCH_USE_S_MODE
+/* If kernel runs in Supervisor mode, declare proper function prototypes,
+ * this is because it is not possible to ecall from S mode to S mode
+ */
+
+int riscv_saveusercontext(uintptr_t *saveregs);
+void riscv_fullcontextrestore(uintptr_t *restoreregs) noreturn_function;
+void riscv_switchcontext(uintptr_t *saveregs, uintptr_t *restoreregs);
+void riscv_syscall_return(void);
+void riscv_syscall_dispatch(void) noreturn_function;
+
+#else
+
+#ifndef __ASSEMBLY__
Review comment:
don't need, already check at line 30
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