zhuyanlinzyl edited a comment on pull request #5336:
URL: https://github.com/apache/incubator-nuttx/pull/5336#issuecomment-1042545274


   @Ouss4 :  
   
   > These are internal CPU interrupts, which means each CPU has both 
ESP32_CPUINT_SOFTWARE0 and  ESP32_CPUINT_SOFTWARE1. They have the same 
interrupt number but controlled from each CPU's registers.
   
   So each CPU have separate internal interrupts,Such as  
`ESP32_CPUINT_SOFTWARE1`  and 
   `ESP32_CPUINT_TIMER0`
   
   Then I think the g_irqmap must be g_irqmap[CONFIG_SMP_NCPUS] for internal 
interrupts.
   Is my understanding correct?
   
   > The thing that I see is going to be a bit messy is how we dispatch the 
interrupts. Since they have the same numbers so in  NuttX they will have the 
same irq number.
   
   I don't think dispatch interrupts is a problem. As every CPU only have one 
interrupt per number , They handle their own interrupts independently.
   
   I have modify up_enable_irq with this patch
   ```
      if (irq < XTENSA_NIRQ_INTERNAL)
        {
   -      /* Enable the CPU interrupt now for internal CPU. */
    
   +      /* Enable the CPU interrupt now for internal CPU. */
   +      if ((irq == 4) && (up_cpu_index() == 0))
   +        {
   +          cpu = 0;
   +        }
          xtensa_enable_cpuint(&g_intenable[cpu], (1ul << cpuint));
        }
   
   
   ```
   
   Then the smp config work well.
   
   ```
   zyl@zyl:~/nuttx$ qemu-system-xtensa -nographic -machine esp32 -smp 2 -drive 
file=./nuttx.merged.bin,if=mtd,format=raw
   ==3509606==WARNING: ASan doesn't fully support makecontext/swapcontext 
functions and may produce false positives in some cases!
   Adding SPI flash device
   ets Jul 29 2019 12:21:46
   
   rst:0x1 (POWERON_RESET),boot:0x12 (SPI_FAST_FLASH_BOOT)
   configsip: 0, SPIWP:0xee
   clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
   mode:DIO, clock div:2
   load:0x3fff0030,len:6604
   ho 0 tail 12 room 4
   load:0x40078000,len:14780
   load:0x40080400,len:3792
   entry 0x40080694
   I (1017) boot: ESP-IDF v4.4 2nd stage bootloader
   I (1031) boot: compile time 19:32:08
   I (1053) boot: chip revision: 0
   I (1069) boot.esp32: SPI Speed      : 40MHz
   I (1072) boot.esp32: SPI Mode       : DIO
   I (1074) boot.esp32: SPI Flash Size : 4MB
   I (1097) boot: Enabling RNG early entropy source...
   I (1129) boot: Partition Table:
   I (1130) boot: ## Label            Usage          Type ST Offset   Length
   I (1132) boot:  0 factory          factory app      00 00 00010000 00100000
   I (1150) boot: End of partition table
   I (1169) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=08708h ( 
34568) map
   I (1270) esp_image: segment 1: paddr=00018730 vaddr=3ffb3ce0 size=00100h (   
256) load
   I (1305) esp_image: segment 2: paddr=00018838 vaddr=40080000 size=01c58h (  
7256) load
   I (1357) esp_image: segment 3: paddr=0001a498 vaddr=00000000 size=05b80h ( 
23424) 
   I (1428) esp_image: segment 4: paddr=00020020 vaddr=400d0020 size=170e0h ( 
94432) map
   I (1632) boot: Loaded app from partition at offset 0x10000
   I (1636) boot: Disabling RNG early entropy source...
   NuttShell (NSH) NuttX-10.2.0
   nsh> ps
     PID GROUP CPU PRI POLICY   TYPE    NPX STATE    EVENT     SIGMASK   STACK  
 USED  FILLED COMMAND
       0     0   0   0 FIFO     Kthread N-- Assigned           00000000 003040 
000976  32.1%  CPU0 IDLE
       1     1   1   0 FIFO     Kthread N-- Running            00000000 003040 
000640  21.0%  CPU1 IDLE
       2     2   0 100 RR       Task    --- Running            00000000 002000 
001840  92.0%! nsh_main
   ```


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