no1wudi commented on a change in pull request #5148:
URL: https://github.com/apache/incubator-nuttx/pull/5148#discussion_r777794145
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File path: arch/risc-v/src/common/riscv_assert.c
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@@ -57,6 +57,14 @@
# define CONFIG_BOARD_RESET_ON_ASSERT 0
#endif
+/* Format output with register width and hex */
+
+#ifdef CONFIG_ARCH_RV32
+# define PRIxREG "8"PRIx32
Review comment:
Yes, but we still need to specific the output width for rv32 (8) and
rv64 (16) by it.
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