ppisa commented on issue #15319:
URL: https://github.com/apache/nuttx/issues/15319#issuecomment-2867293910
As I have stated, we again plan to look at the code ant test it. Yes, what
is the best solution is questionable and there have been significant changes
and some are significant misunderstanding to code which you introduced. I.e.
masking of the introduced IOCTL value by 0xffff in the code
```
ret = (priv->pcnt->ops->ioctl(priv->pcnt,
CAPIOC_PULSES,
(unsigned long)&count) & 0xffff);
if (ret < 0)
```
compare it with the original code before your commit which mask count to 16
bits because it is limit of the hardware
```
count = (int16_t)(pcnt_ll_get_count(priv->dev,
priv->config->pcntid) & 0xffff);
```
I have not tested the code at that time but I send notice that it seems to
be broken.
The masking should be applied to
```
count &= 0xffff;
```
The need to pass each QENC read over another IOCTL multiplexing layer
enhances complexity. The whole code with IOCTL call is under
`spin_lock_irqsave(&priv->lock);` Again I consider that as a problem, because
we are targeting real time at least as playground on ESP which can demonstrate
that at least for teaching it can be used on par with some of our much more
tested platforms where we have some RT guarantees as SAMv8 or even really SIL
grade HW as Ti TMS570 (not with NuttX there yet, RTEMS or bare metal).
--
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
To unsubscribe, e-mail: commits-unsubscr...@nuttx.apache.org
For queries about this service, please contact Infrastructure at:
us...@infra.apache.org
